From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 880D4C433DB for ; Mon, 8 Feb 2021 18:27:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 30C5464E6D for ; Mon, 8 Feb 2021 18:27:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231640AbhBHS1P (ORCPT ); Mon, 8 Feb 2021 13:27:15 -0500 Received: from marcansoft.com ([212.63.210.85]:38724 "EHLO mail.marcansoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234141AbhBHPv7 (ORCPT ); Mon, 8 Feb 2021 10:51:59 -0500 Received: from [127.0.0.1] (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: marcan@marcan.st) by mail.marcansoft.com (Postfix) with ESMTPSA id DE5D94207F; Mon, 8 Feb 2021 15:51:11 +0000 (UTC) Subject: Re: [PATCH 08/18] arm64: cpufeature: Add a feature for FIQ support To: Marc Zyngier List-Id: Cc: soc@kernel.org, linux-arm-kernel@lists.infradead.org, robh+dt@kernel.org, Arnd Bergmann , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Olof Johansson References: <20210204203951.52105-1-marcan@marcan.st> <20210204203951.52105-9-marcan@marcan.st> <87im75l2lp.wl-maz@kernel.org> <87czxalrwc.wl-maz@kernel.org> From: Hector Martin Message-ID: <271fc761-d782-31b8-d97b-907041f15289@marcan.st> Date: Tue, 9 Feb 2021 00:51:09 +0900 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.0 MIME-Version: 1.0 In-Reply-To: <87czxalrwc.wl-maz@kernel.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: es-ES Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 08/02/2021 20.29, Marc Zyngier wrote: > I'm not sure we want to trust the FW on that particular front (no > offence intended...;-). Hey, I don't even *use* the timers IRQs; if they are unmasked it's iBoot's fault! :-) > That is my current take on this patch. Nothing in the arm64 kernel > expects a FIQ today, so *when* a FIQ fires is pretty much irrelevant, > as long as we handle it properly (panic). Keeping the two bits in sync > is trivial, and shouldn't carry material overhead. Sounds good then, and again that simplifies a ton of stuff. Will go for that in v2. > Aside from the lack of programmable priority, the lack of convenient > masking for per-CPU interrupts is a bit of an issue... Yeah... we'll see how that goes. -- Hector Martin (marcan@marcan.st) Public Key: https://mrcn.st/pub