From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754889AbeDZK61 (ORCPT ); Thu, 26 Apr 2018 06:58:27 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:51834 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752985AbeDZK6X (ORCPT ); Thu, 26 Apr 2018 06:58:23 -0400 Subject: Re: [PATCH v2 05/17] arm64: Helper for parange to PASize To: Suzuki K Poulose , linux-arm-kernel@lists.infradead.org Cc: ard.biesheuvel@linaro.org, kvm@vger.kernel.org, marc.zyngier@arm.com, catalin.marinas@arm.com, punit.agrawal@arm.com, will.deacon@arm.com, linux-kernel@vger.kernel.org, kristina.martsenko@arm.com, pbonzini@redhat.com, kvmarm@lists.cs.columbia.edu References: <1522156531-28348-1-git-send-email-suzuki.poulose@arm.com> <1522156531-28348-6-git-send-email-suzuki.poulose@arm.com> From: Julien Grall Message-ID: <2910d406-315f-6f0f-7456-df9d80a08087@arm.com> Date: Thu, 26 Apr 2018 11:58:19 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: <1522156531-28348-6-git-send-email-suzuki.poulose@arm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Suzuki, On 27/03/18 14:15, Suzuki K Poulose wrote: > Add a helper to convert ID_AA64MMFR0_EL1:PARange to they physical > size shift. Limit the size to the maximum supported by the kernel. > We are about to move the user of this code and this helps to > keep the changes cleaner. It is probably worth to mention that you are also adding 52-bit support in the patch. Cheers, > > Cc: Mark Rutland > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Marc Zyngier > Cc: Christoffer Dall > Signed-off-by: Suzuki K Poulose > --- > arch/arm64/include/asm/cpufeature.h | 16 ++++++++++++++++ > arch/arm64/kvm/hyp/s2-setup.c | 28 +++++----------------------- > 2 files changed, 21 insertions(+), 23 deletions(-) > > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h > index fbf0aab..1f2a5dd 100644 > --- a/arch/arm64/include/asm/cpufeature.h > +++ b/arch/arm64/include/asm/cpufeature.h > @@ -311,6 +311,22 @@ static inline u64 read_zcr_features(void) > return zcr; > } > > +static inline u32 id_aa64mmfr0_parange_to_phys_shift(int parange) > +{ > + switch (parange) { > + case 0: return 32; > + case 1: return 36; > + case 2: return 40; > + case 3: return 42; > + case 4: return 44; > + /* Report 48 bit if the kernel doesn't support 52bit */ > + default: > + case 5: return 48; > +#ifdef CONFIG_ARM64_PA_BITS_52 > + case 6: return 52; > +#endif > + } > +} > #endif /* __ASSEMBLY__ */ > > #endif > diff --git a/arch/arm64/kvm/hyp/s2-setup.c b/arch/arm64/kvm/hyp/s2-setup.c > index 603e1ee..b1129c8 100644 > --- a/arch/arm64/kvm/hyp/s2-setup.c > +++ b/arch/arm64/kvm/hyp/s2-setup.c > @@ -19,11 +19,13 @@ > #include > #include > #include > +#include > > u32 __hyp_text __init_stage2_translation(void) > { > u64 val = VTCR_EL2_FLAGS; > u64 parange; > + u32 phys_shift; > u64 tmp; > > /* > @@ -37,27 +39,7 @@ u32 __hyp_text __init_stage2_translation(void) > val |= parange << 16; > > /* Compute the actual PARange... */ > - switch (parange) { > - case 0: > - parange = 32; > - break; > - case 1: > - parange = 36; > - break; > - case 2: > - parange = 40; > - break; > - case 3: > - parange = 42; > - break; > - case 4: > - parange = 44; > - break; > - case 5: > - default: > - parange = 48; > - break; > - } > + phys_shift = id_aa64mmfr0_parange_to_phys_shift(parange); > > /* > * ... and clamp it to 40 bits, unless we have some braindead > @@ -65,7 +47,7 @@ u32 __hyp_text __init_stage2_translation(void) > * return that value for the rest of the kernel to decide what > * to do. > */ > - val |= 64 - (parange > 40 ? 40 : parange); > + val |= 64 - (phys_shift > 40 ? 40 : phys_shift); > > /* > * Check the availability of Hardware Access Flag / Dirty Bit > @@ -86,5 +68,5 @@ u32 __hyp_text __init_stage2_translation(void) > > write_sysreg(val, vtcr_el2); > > - return parange; > + return phys_shift; > } > -- Julien Grall