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From: Chris Packham <Chris.Packham@alliedtelesis.co.nz>
To: Borislav Petkov <bp@alien8.de>
Cc: "robh+dt@kernel.org" <robh+dt@kernel.org>,
	"gregory.clement@free-electrons.com" 
	<gregory.clement@free-electrons.com>,
	"jlu@pengutronix.de" <jlu@pengutronix.de>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Mauro Carvalho Chehab <mchehab@kernel.org>
Subject: Re: [RESEND PATCH 4/4] EDAC: add support for reduced-width Armada-XP SDRAM
Date: Sun, 13 Aug 2017 21:28:11 +0000	[thread overview]
Message-ID: <291f8d81da814b91aee0a5e6a1133a53@svr-chch-ex1.atlnz.lc> (raw)
In-Reply-To: 20170811091402.GD9432@nazgul.tnic

On 11/08/17 21:14, Borislav Petkov wrote:
> On Mon, Aug 07, 2017 at 01:46:41PM +1200, Chris Packham wrote:
>> Some integrated Armada XP SoCs use a reduced pin count so the width of
>> the SDRAM interface is smaller than the traditional discrete SoCs. This
>> means that the definition of "full" and "half" width is further reduced.
>>
>> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
>> ---
>>   drivers/edac/armada_xp_edac.c | 3 +++
>>   1 file changed, 3 insertions(+)
>>
>> diff --git a/drivers/edac/armada_xp_edac.c b/drivers/edac/armada_xp_edac.c
>> index 68e88b180928..d8edcaac87c0 100644
>> --- a/drivers/edac/armada_xp_edac.c
>> +++ b/drivers/edac/armada_xp_edac.c
>> @@ -350,6 +350,9 @@ static int armada_xp_mc_edac_probe(struct platform_device *pdev)
>>   	if (armada_xp_mc_edac_read_config(mci))
>>   		return -EINVAL;
>>   
>> +	if (of_property_read_bool(pdev->dev.of_node, "marvell,reduced-width"))
>> +		drvdata->width /= 2;
> 
> If the compiler doesn't already convert it to a shift on ARM, you
> probably should do
> 
> 		>>= 1;
> 
> here, just in case.

Based on discussions around the first patch in this series the final 
version will probably be something like

   if (of_device_is_compatible(pdev->dev.of_node,
                               "marvell,98dx3236-sdram-controller")
           drvdata->width >>= 1;

> 
> With that you can add my
> 
> Acked-by: Borislav Petkov <bp@suse.de>
> 
> and route it through an ARM tree.

That may depend on where Jan's series lands. This is is the only patch 
that is dependent on it. Regardless it should be inert so aside from 
triggering checkpatch warnings about dt-bindings there would be no harm 
in this patch taking the long way round.

> 
> Thx.
> 

  reply	other threads:[~2017-08-13 21:28 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-07  1:46 [RESEND PATCH 0/4] EDAC: support reduce bus width on 98dx3236 Chris Packham
2017-08-07  1:46 ` [RESEND PATCH 1/4] ARM: dts: enable L2 cache parity and ecc on db-xc3-24g4xg board Chris Packham
2017-08-07  1:46 ` [RESEND PATCH 2/4] dt-bindings: add "reduced-width" property for Armada XP SDRAM controller Chris Packham
2017-08-10 20:38   ` Rob Herring
2017-08-10 21:17     ` Chris Packham
2017-08-11  9:34       ` Jan Lübbe
2017-08-07  1:46 ` [RESEND PATCH 3/4] ARM: dts: mvebu: set reduced-width property for SDRAM on 98dx3236 Chris Packham
2017-08-07  1:46 ` [RESEND PATCH 4/4] EDAC: add support for reduced-width Armada-XP SDRAM Chris Packham
2017-08-11  9:14   ` Borislav Petkov
2017-08-13 21:28     ` Chris Packham [this message]
2017-09-20 13:04 ` [RESEND PATCH 0/4] EDAC: support reduce bus width on 98dx3236 Gregory CLEMENT
2017-09-20 15:56   ` Chris Packham

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