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([2600:1010:b01f:7d2b:6939:d09e:b43f:2a80]) by smtp.gmail.com with ESMTPSA id c137sm8834253pfb.154.2019.05.04.13.12.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 04 May 2019 13:12:10 -0700 (PDT) Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (1.0) Subject: Re: [RFC][PATCH 1/2] x86: Allow breakpoints to emulate call functions From: Andy Lutomirski X-Mailer: iPhone Mail (16E227) In-Reply-To: Date: Sat, 4 May 2019 13:12:09 -0700 Cc: Steven Rostedt , Peter Zijlstra , Linux List Kernel Mailing , Ingo Molnar , Andrew Morton , Andy Lutomirski , Nicolai Stange , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , the arch/x86 maintainers , Josh Poimboeuf , Jiri Kosina , Miroslav Benes , Petr Mladek , Joe Lawrence , Shuah Khan , Konrad Rzeszutek Wilk , Tim Chen , Sebastian Andrzej Siewior , Mimi Zohar , Juergen Gross , Nick Desaulniers , Nayna Jain , Masahiro Yamada , Joerg Roedel , "open list:KERNEL SELFTEST FRAMEWORK" , stable Content-Transfer-Encoding: quoted-printable Message-Id: <2BF1AE4B-8105-49F0-8B6A-AA3B11FD66FD@amacapital.net> References: <20190501202830.347656894@goodmis.org> <20190501203152.397154664@goodmis.org> <20190501232412.1196ef18@oasis.local.home> <20190502162133.GX2623@hirez.programming.kicks-ass.net> <20190502181811.GY2623@hirez.programming.kicks-ass.net> <20190502202146.GZ2623@hirez.programming.kicks-ass.net> <20190503152405.2d741af8@gandalf.local.home> <20190503184919.2b7ef242@gandalf.local.home> <20190504001756.17fad840@oasis.local.home> To: Linus Torvalds Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > On May 4, 2019, at 11:59 AM, Linus Torvalds wrote: >=20 > On Fri, May 3, 2019 at 10:08 PM Linus Torvalds > wrote: >>=20 >> I'll look at it tomorrow, but I think this actually makes unnecessary cha= nges. >>=20 >> In particular, I think we could keep the existing entry code almost uncha= nged with this whole approach. >=20 > So here's what I *think* should work. Note that I also removed your > test-case code, because it really didn't have a chance in hell of > working. Doing that >=20 > int3_emulate_call(regs, (unsigned long)&int3_magic); >=20 > inside of int3_exception_notify() could not possibly be valid, since > int3_emulate_call() returns the new pt_regs that need to be used, and > throwing it away is clearly wrong. >=20 > So you can't use a register_die_notifier() to try to intercept the > 'int3' error and then do it manually, it needs to be done by the > ftrace_int3_handler() code that actually returns the new regs, and > where do_kernel_int3() will then return it to the low-level handler. I hate register_die_notifier(), so I consider this a plus. I=E2=80=99ve occa= sionally considered removing the ability for the notifiers to skip normal pr= ocessing, because, as it stands, figuring out what actually happens in the t= rap handlers is almost impossible. It generally looks sane to me. As an aside, is it even *possible* to get #BP from v8086 mode? On a quick S= DM read, the INT3 instruction causes #GP if VM=3D1 and IOPL<3. And, if we a= llow vm86() to have IOPL=3D3, we should just remove that ability. It=E2=80=99= s nuts. (We should maybe consider a config option for iopl() that defaults off. We=E2= =80=99ve supported ioperm() for a long, long time.)=