From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754207AbcH0PFp (ORCPT ); Sat, 27 Aug 2016 11:05:45 -0400 Received: from lucky1.263xmail.com ([211.157.147.130]:35772 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753411AbcH0PFn (ORCPT ); Sat, 27 Aug 2016 11:05:43 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-RL-SENDER: shawn.lin@rock-chips.com X-FST-TO: wxt@rock-chips.com X-SENDER-IP: 220.200.59.42 X-LOGIN-NAME: shawn.lin@rock-chips.com X-UNIQUE-TAG: <3c0051ad647ca88065744c5c891cc437> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH 2/2] arm64: dts: rockchip: add eMMC's power domain support for rk3399 To: Ziyuan Xu , ulf.hansson@linaro.org, robh+dt@kernel.org, heiko@sntech.de References: <20160827134103.28160-1-xzy.xu@rock-chips.com> <20160827134103.28160-3-xzy.xu@rock-chips.com> Cc: shawn.lin@rock-chips.com, Mark Rutland , devicetree@vger.kernel.org, Elaine Zhang , Catalin Marinas , Xing Zheng , Masahiro Yamada , Frank Wang , Brian Norris , Will Deacon , linux-kernel@vger.kernel.org, Douglas Anderson , linux-rockchip@lists.infradead.org, Jianqun Xu , David Wu , Shunqian Zheng , linux-arm-kernel@lists.infradead.org, Caesar Wang From: Shawn Lin Message-ID: <2ab8ab94-fa4d-2cd6-5805-a92ac5f9697e@rock-chips.com> Date: Sat, 27 Aug 2016 23:05:20 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-Version: 1.0 In-Reply-To: <20160827134103.28160-3-xzy.xu@rock-chips.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2016/8/27 21:41, Ziyuan Xu wrote: > Control power domain for eMMC via genpd to reduce power consumption. > > Signed-off-by: Elaine Zhang > Signed-off-by: Ziyuan Xu > It looks nice to me. But this should be merged after applying that[0] as your patch will break bind/unbind test for sdhci-of-arasan on rk3399 without it[0]. Moreover, Elaine should make sure that upstreamed rockchip power domain stuff would not off pd for emmc, *otherwise*, I should update my patch to make sure we update clkmul every time when doing suspend 2 resume.. [0]: https://patchwork.kernel.org/patch/9300971/ > --- > > arch/arm64/boot/dts/rockchip/rk3399.dtsi | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > index 32aebc8..71733d4 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > @@ -239,6 +239,7 @@ > #clock-cells = <0>; > phys = <&emmc_phy>; > phy-names = "phy_arasan"; > + power-domains = <&power RK3399_PD_EMMC>; > status = "disabled"; > }; > > @@ -611,6 +612,11 @@ > status = "disabled"; > }; > > + qos_emmc: qos@ffa58000 { > + compatible = "syscon"; > + reg = <0x0 0xffa58000 0x0 0x20>; > + }; > + > qos_hdcp: qos@ffa90000 { > compatible = "syscon"; > reg = <0x0 0xffa90000 0x0 0x20>; > @@ -739,6 +745,11 @@ > }; > > /* These power domains are grouped by VD_LOGIC */ > + pd_emmc@RK3399_PD_EMMC { > + reg = ; > + clocks = <&cru ACLK_EMMC>; > + pm_qos = <&qos_emmc>; > + }; > pd_vio@RK3399_PD_VIO { > reg = ; > #address-cells = <1>; > -- Best Regards Shawn Lin