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Subject: Re: [alsa-devel] [PATCH 5/9] ASoC: tegra: add Tegra210 based AHUB
 driver
To:     Dmitry Osipenko <digetx@gmail.com>,
        Sameer Pujar <spujar@nvidia.com>, <perex@perex.cz>,
        <tiwai@suse.com>, <robh+dt@kernel.org>
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From:   Jon Hunter <jonathanh@nvidia.com>
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On 24/01/2020 01:18, Dmitry Osipenko wrote:
> 20.01.2020 17:23, Sameer Pujar =D0=BF=D0=B8=D1=88=D0=B5=D1=82:
> [snip]
>> +static int tegra_ahub_get_value_enum(struct snd_kcontrol *kctl,
>> +				     struct snd_ctl_elem_value *uctl)
>> +{
>> +	struct snd_soc_component *cmpnt =3D snd_soc_dapm_kcontrol_component(kc=
tl);
>> +	struct tegra_ahub *ahub =3D snd_soc_component_get_drvdata(cmpnt);
>> +	struct soc_enum *e =3D (struct soc_enum *)kctl->private_value;
>> +	unsigned int reg, i, bit_pos =3D 0;
>> +
>> +	/*
>> +	 * Find the bit position of current MUX input.
>> +	 * If nothing is set, position would be 0 and it corresponds to 'None'=
.
>> +	 */
>> +	for (i =3D 0; i < ahub->soc_data->reg_count; i++) {
>> +		unsigned int reg_val;
>> +
>> +		reg =3D e->reg + (TEGRA210_XBAR_PART1_RX * i);
>> +		snd_soc_component_read(cmpnt, reg, &reg_val);
>> +		reg_val &=3D ahub->soc_data->mask[i];
>> +
>> +		if (reg_val) {
>> +			bit_pos =3D ffs(reg_val) +
>> +				  (8 * cmpnt->val_bytes * i);
>=20
> Multiplication takes precedence, braces are not needed. Same for all
> other occurrences in the code.

Personally, I prefer the above as it is explicit and helps readability.

Jon

--=20
nvpublic