From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67691C433FE for ; Tue, 15 Mar 2022 14:51:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349453AbiCOOwi (ORCPT ); Tue, 15 Mar 2022 10:52:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60228 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349411AbiCOOwe (ORCPT ); Tue, 15 Mar 2022 10:52:34 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 92A0155210; Tue, 15 Mar 2022 07:51:22 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: kholk11) with ESMTPSA id D2B311F43050 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1647355881; bh=n28oXfgiw2Sb0y58LuA7Dn1PCfsvC7PCYkSYkQ3Pfmg=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=nzL5e1Iphmg+/ZBEDGylNE+pSMHeI3jXwGQyvbpaR2OWt9pzZUoetEfa8BuEkYzaY dI/TdHxgmuU7hQowtlTm3yOvbXFo8SwNVM6GVE2EF9C1TsczgdmeW1xPOyfCJ1wv4i moxO0164tp5afwwdB0eKpS7iTSjAcUrrdw4UoJq7oqIupiodd5+2fP/cXaMtz9bBK9 AIvk6uW4aHSkpBpE7mBixutENcSxct7V6gQNpuOj0EFFmkJUdIRhHkMtTmlwU4FlI/ JjOM4pTgq6bRZJH6Pfv14xHU4799h17qrMLJKpd9ZParSy9NwmJpiyaGM2v5AvLcnt YvYaql8OOxIHw== Message-ID: <2c6e0974-1418-82ae-506b-62cd1e5f6d3c@collabora.com> Date: Tue, 15 Mar 2022 15:51:18 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.1 Subject: Re: [PATCH v3 19/21] arm64: dts: mt8192: Add dsi node Content-Language: en-US To: Allen-KH Cheng , Matthias Brugger , Rob Herring , Krzysztof Kozlowski Cc: Project_Global_Chrome_Upstream_Group@mediatek.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Chen-Yu Tsai , Ryder Lee , Hui Liu References: <20220304130809.12924-1-allen-kh.cheng@mediatek.com> <20220304130809.12924-20-allen-kh.cheng@mediatek.com> From: AngeloGioacchino Del Regno In-Reply-To: <20220304130809.12924-20-allen-kh.cheng@mediatek.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Il 04/03/22 14:08, Allen-KH Cheng ha scritto: > Add dsi ndoe for mt8192 SoC. > > Signed-off-by: Allen-KH Cheng > --- > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > index 94f88e52776b..3d16cb0b3ea1 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > @@ -1327,6 +1327,20 @@ > clocks = <&mmsys CLK_MM_DISP_DITHER0>; > }; > > + dsi0: dsi@14010000 { > + compatible = "mediatek,mt8183-dsi"; > + reg = <0 0x14010000 0 0x1000>; > + interrupts = ; > + mediatek,syscon-dsi = <&mmsys 0x140>; mediatek,syscon-dsi does not exist upstream: here we have proper reset controller support. > + clocks = <&mmsys CLK_MM_DSI0>, > + <&mmsys CLK_MM_DSI_DSI0>, > + <&mipi_tx0>; > + clock-names = "engine", "digital", "hs"; > + phys = <&mipi_tx0>; > + phy-names = "dphy"; On MT8183, we do.... resets = <&mmsys MT8183_MMSYS_SW0_RST_B_DISP_DSI0>; ...so you need to simply replicate for MT8192. Please do. > + status = "disabled"; > + }; > + > ovl_2l2: ovl@14014000 { > compatible = "mediatek,mt8192-disp-ovl-2l"; > reg = <0 0x14014000 0 0x1000>;