From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6DEBEC4360C for ; Tue, 8 Oct 2019 13:45:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 51CFC20673 for ; Tue, 8 Oct 2019 13:45:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726217AbfJHNpY (ORCPT ); Tue, 8 Oct 2019 09:45:24 -0400 Received: from mga02.intel.com ([134.134.136.20]:36613 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725821AbfJHNpX (ORCPT ); Tue, 8 Oct 2019 09:45:23 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Oct 2019 06:45:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,270,1566889200"; d="scan'208";a="205418032" Received: from ahunter-desktop.fi.intel.com (HELO [10.237.72.188]) ([10.237.72.188]) by orsmga002.jf.intel.com with ESMTP; 08 Oct 2019 06:45:19 -0700 Subject: Re: [PATCH v1 2/2] mmc: sdhci-of-arasan: Add Support for Intel LGM SDXC To: "Ramuthevar,Vadivel MuruganX" , ulf.hansson@linaro.org, linux-mmc@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, michal.simek@xilinx.com, robh+dt@kernel.org, mark.rutland@arm.com, andriy.shevchenko@intel.com, cheol.yong.kim@intel.com, qi-ming.wu@intel.com References: <20191003040032.37696-1-vadivel.muruganx.ramuthevar@linux.intel.com> <20191003040032.37696-3-vadivel.muruganx.ramuthevar@linux.intel.com> From: Adrian Hunter Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Message-ID: <2cbda555-42d2-392c-0887-09cae4a35dce@intel.com> Date: Tue, 8 Oct 2019 16:44:19 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <20191003040032.37696-3-vadivel.muruganx.ramuthevar@linux.intel.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 3/10/19 7:00 AM, Ramuthevar,Vadivel MuruganX wrote: > From: Ramuthevar Vadivel Murugan > > The current arasan sdhci PHY configuration isn't compatible > with the PHY on Intel's LGM(Lightning Mountain) SoC devices. > > Therefore, add a new compatible, to adapt the Intel's LGM > SDXC PHY with arasan-sdhc controller to configure the PHY. > > Signed-off-by: Ramuthevar Vadivel Murugan Acked-by: Adrian Hunter > --- > drivers/mmc/host/sdhci-of-arasan.c | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c > index 7023cbec4017..55de839a8a5e 100644 > --- a/drivers/mmc/host/sdhci-of-arasan.c > +++ b/drivers/mmc/host/sdhci-of-arasan.c > @@ -120,6 +120,12 @@ static const struct sdhci_arasan_soc_ctl_map intel_lgm_emmc_soc_ctl_map = { > .hiword_update = false, > }; > > +static const struct sdhci_arasan_soc_ctl_map intel_lgm_sdxc_soc_ctl_map = { > + .baseclkfreq = { .reg = 0x80, .width = 8, .shift = 2 }, > + .clockmultiplier = { .reg = 0, .width = -1, .shift = -1 }, > + .hiword_update = false, > +}; > + > /** > * sdhci_arasan_syscon_write - Write to a field in soc_ctl registers > * > @@ -384,6 +390,11 @@ static struct sdhci_arasan_of_data intel_lgm_emmc_data = { > .pdata = &sdhci_arasan_cqe_pdata, > }; > > +static struct sdhci_arasan_of_data intel_lgm_sdxc_data = { > + .soc_ctl_map = &intel_lgm_sdxc_soc_ctl_map, > + .pdata = &sdhci_arasan_cqe_pdata, > +}; > + > #ifdef CONFIG_PM_SLEEP > /** > * sdhci_arasan_suspend - Suspend method for the driver > @@ -489,6 +500,10 @@ static const struct of_device_id sdhci_arasan_of_match[] = { > .compatible = "intel,lgm-sdhci-5.1-emmc", > .data = &intel_lgm_emmc_data, > }, > + { > + .compatible = "intel,lgm-sdhci-5.1-sdxc", > + .data = &intel_lgm_sdxc_data, > + }, > /* Generic compatible below here */ > { > .compatible = "arasan,sdhci-8.9a", >