From: Ludovic BARRE <ludovic.barre@st.com>
To: Rob Herring <robh@kernel.org>
Cc: Ulf Hansson <ulf.hansson@linaro.org>,
<srinivas.kandagatla@linaro.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@st.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-mmc@vger.kernel.org>,
<linux-stm32@st-md-mailman.stormreply.com>
Subject: Re: [PATCH 5/9] dt-bindings: mmc: mmci: add delay block base register for sdmmc
Date: Thu, 16 Jan 2020 10:20:26 +0100 [thread overview]
Message-ID: <2ce63f11-8b0c-8261-63fa-cd19e874c537@st.com> (raw)
In-Reply-To: <20200115145645.GA599@bogus>
Hi Rob
Le 1/15/20 à 3:56 PM, Rob Herring a écrit :
> On Fri, Jan 10, 2020 at 02:48:19PM +0100, Ludovic Barre wrote:
>> To support the sdr104 mode, the sdmmc variant has a
>> hardware delay block to manage the clock phase when sampling
>> data received by the card.
>>
>> This patch adds a second base register (optional) for
>> sdmmc delay block.
>>
>> Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
>> ---
>> Documentation/devicetree/bindings/mmc/mmci.txt | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mmc/mmci.txt b/Documentation/devicetree/bindings/mmc/mmci.txt
>> index 6d3c626e017d..4ec921e4bf34 100644
>> --- a/Documentation/devicetree/bindings/mmc/mmci.txt
>> +++ b/Documentation/devicetree/bindings/mmc/mmci.txt
>> @@ -28,6 +28,8 @@ specific for ux500 variant:
>> - st,sig-pin-fbclk : feedback clock signal pin used.
>>
>> specific for sdmmc variant:
>> +- reg : a second base register may be defined if a delay
>> + block is present and used for tuning.
>
> Which compatibles have a 2nd reg entry?
In fact, mmci driver is ARM Amba driver (arm,primecell) and has only one
compatible "arm,pl18x".
The variants are identified by primecell-periphid property
(discovered at runtime with HW block register or defined by
device tree property "arm,primecell-periphid").
The defaults "arm,pl18x" variants have only one base register,
but the SDMMC need a second base register for these
delay block registers.
example of sdmmc node:
sdmmc1: sdmmc@58005000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00253180>;
reg = <0x58005000 0x1000>, <0x58006000 0x1000>;
};
what do you advise?
>
>> - st,sig-dir : signal direction polarity used for cmd, dat0 dat123.
>> - st,neg-edge : data & command phase relation, generated on
>> sd clock falling edge.
>> --
>> 2.17.1
>>
next prev parent reply other threads:[~2020-01-16 9:21 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-10 13:48 [PATCH 0/9] mmc: mmci: sdmmc: add sdr104 support Ludovic Barre
2020-01-10 13:48 ` [PATCH 1/9] mmc: mmci: sdmmc: replace sg_dma_xxx macros Ludovic Barre
2020-01-10 13:48 ` [PATCH 2/9] mmc: mmci: sdmmc: rename sdmmc_priv struct to sdmmc_idma Ludovic Barre
2020-01-10 13:48 ` [PATCH 3/9] mmc: mmci: add a reference at mmc_host_ops in mmci struct Ludovic Barre
2020-01-24 13:09 ` Ulf Hansson
2020-01-27 10:57 ` Ludovic BARRE
2020-01-10 13:48 ` [PATCH 4/9] mmc: mmci: add private pointer for variant Ludovic Barre
2020-01-10 13:48 ` [PATCH 5/9] dt-bindings: mmc: mmci: add delay block base register for sdmmc Ludovic Barre
2020-01-15 14:56 ` Rob Herring
2020-01-16 9:20 ` Ludovic BARRE [this message]
2020-01-16 14:33 ` Rob Herring
2020-01-16 14:52 ` Ludovic BARRE
2020-01-10 13:48 ` [PATCH 6/9] mmc: mmci: sdmmc: add execute tuning with delay block Ludovic Barre
2020-01-24 13:10 ` Ulf Hansson
2020-01-27 13:19 ` Ludovic BARRE
2020-01-10 13:48 ` [PATCH 7/9] mmc: mmci: add volt_switch callbacks Ludovic Barre
2020-01-24 13:12 ` Ulf Hansson
2020-01-27 13:21 ` Ludovic BARRE
2020-01-10 13:48 ` [PATCH 8/9] mmc: mmci: sdmmc: add voltage switch functions Ludovic Barre
2020-01-24 13:16 ` Ulf Hansson
2020-01-27 13:50 ` Ludovic BARRE
2020-01-10 13:48 ` [PATCH 9/9] mmc: mmci: add sdmmc variant revision 2.0 Ludovic Barre
2020-01-24 12:55 ` [PATCH 0/9] mmc: mmci: sdmmc: add sdr104 support Ludovic BARRE
2020-01-24 13:19 ` Ulf Hansson
2020-01-27 13:52 ` Ludovic BARRE
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