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From: Taniya Das <tdas@codeaurora.org>
To: Sudeep Holla <sudeep.holla@arm.com>
Cc: Amit Kucheria <amit.kucheria@verdurent.com>,
	LKML <linux-kernel@vger.kernel.org>,
	Linux PM list <linux-pm@vger.kernel.org>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Viresh Kumar <viresh.kumar@linaro.org>,
	Stephen Boyd <sboyd@kernel.org>,
	Rajendra Nayak <rnayak@codeaurora.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>, Rob Herring <robh@kernel.org>,
	Saravana Kannan <skannan@codeaurora.org>
Subject: Re: [PATCH v4 1/2] dt-bindings: cpufreq: Introduce QCOM CPUFREQ FW bindings
Date: Tue, 19 Jun 2018 16:14:50 +0530	[thread overview]
Message-ID: <2d37f581-38af-872a-36df-0250b0f7e411@codeaurora.org> (raw)
In-Reply-To: <f26813f1-f8da-ef92-fd86-6e648fbbf3e9@arm.com>



On 6/19/2018 3:04 PM, Sudeep Holla wrote:
> 
> 
> On 19/06/18 08:53, Taniya Das wrote:
>>
>>
>> On 6/18/2018 2:51 PM, Sudeep Holla wrote:
>>>
>>>
>>> On 15/06/18 18:40, Taniya Das wrote:
>>>>
>>>>
>>>> On 6/15/2018 5:29 PM, Amit Kucheria wrote:
>>>
>>> [...]
>>>
>>>>> A future version of the HW engine, or more likely, a firmware
>>>>> revision, will make more functionality available. Say, this needs
>>>>> access to another register or two. This will require changing the DT
>>>>> bindings. Instead, if you map the entire address space, you can just
>>>>> add offsets to the new registers.
>>>>>
>>>>> So in this case, I think you should define the following addresses
>>>>> (size 0x1400) for the two frequency domains
>>>>>
>>>>> 0x17d43000, 0x1400 (power cluster)
>>>>> 0x17d45800, 0x1400 (perf cluster)
>>>>>
>>>>> And in the driver simply add offsets as follows:
>>>>>
>>>>> #define ENABLE_OFFSET               0x0
>>>>> #define LUT_OFFSET                      0x110
>>>>> #define PERF_DESIRED_OFFSET 0x920
>>>>>
>>>>
>>>> The offsets could vary across versions of this IP and that is the reason
>>>> to provide them through the DT and not define any such offsets.
>>>>
>>>
>>> Just get compatibles to identify the version of the hardware if it can't
>>> be probed and detected. Please don't use DT to get the addresses of each
>>> register you use in the driver. That's neither scalable nor nice
>>> solution to the problem.
>>> Hello Sudeep and Amit,
>>
>> Thanks for the comments, I am consolidating the understanding from the
>> other emails in a single one.
>>
>> I understand that you are looking for this IP to map the full region and
>> define offsets according to access them.
>>
>> But I still not sure how do you want this common driver to scale in the
>> cases where the offsets could vary across version change.
>>
> 
> There are plenty of drivers that you can look at as example. TBH most of
> the drivers implementing support for multiple versions of IP do
> something on the similar lines.
> 
>>   DT
>> ====
>>    freq-node {
>>      reg = < X x_size>;   Where X is the start of the IP address.
>>    }
>>
>> Driver code (The below representation is just for example).
>> =============
>>
>> V1
>> #define ENABLE    0x0
>> #define LUT_V1    0x110
>> #define PERF_V1    0x920
>>
>> V2
>> #define LUT_V2    0x150
>> #define PERF_V2    0x980
>>
>> V3
>> #define LUT_V3    0x120
>> ....
>>
>> Do you want me to use "compatible" flag to
>>
>> if (compatible == v1)
>>   enable =  readl_relaxed(X + LUT_V1);
>> else if (compatible == v2)
>>   enable = readl_relaxed(X + LUT_V2);
>> else if (compatible == v3)
>>   enable = readl_relaxed(X + LUT_V2);
>>
> 
> These are implementation details. But you should try to use compatibles
> only in probe and just record the version in some variable or update the
> offsets in some device specific structure so that you can use that
> unconditionally for any access you make on that device.
> 
>> With the current design I do not need such compatible checks and unmap
>> the ones which are not required after probe.
> 
> I am not sure what you mean by unmap after probe.
> 
>> Please let me know your comments.
>>
> 
> Please look at some drivers in the Linux tree for examples. Infact there
> may be few drivers on QCOM SoC itself. What I am suggesting is the normal
> practice in the drivers and you should see plenty of examples. Since I
> was looking at some serial port patch, I can say you can have a look at
> drivers/tty/serial/amba-pl011.c which supports multiple versions from
> different vendors. I am sure there are many simpler examples but AMBA PL011
> just stood out.
> 

Thanks Sudeep, let me take a look at the driver to see how I can 
associate data (offsets) based on compatible.

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation.

--

  reply	other threads:[~2018-06-19 10:45 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-12 11:02 [PATCH v4 0/2] cpufreq: qcom-fw: Add support for QCOM cpufreq FW driver Taniya Das
2018-06-12 11:02 ` [PATCH v4 1/2] dt-bindings: cpufreq: Introduce QCOM CPUFREQ FW bindings Taniya Das
2018-06-13 11:26   ` Sudeep Holla
2018-06-13 18:13     ` Taniya Das
2018-06-14 10:47       ` Sudeep Holla
2018-06-14 18:24         ` Taniya Das
2018-06-15 11:59           ` Amit Kucheria
2018-06-15 13:27             ` Sudeep Holla
2018-06-15 17:40             ` Taniya Das
2018-06-15 17:45               ` Sudeep Holla
2018-06-17  9:03               ` Amit Kucheria
2018-06-18  9:21               ` Sudeep Holla
2018-06-19  7:53                 ` Taniya Das
2018-06-19  9:21                   ` Viresh Kumar
2018-06-19  9:34                   ` Sudeep Holla
2018-06-19 10:44                     ` Taniya Das [this message]
2018-06-15 13:23           ` Sudeep Holla
2018-06-15 17:31             ` Taniya Das
2018-06-15 17:42               ` Sudeep Holla
2018-06-15 13:07   ` Amit Kucheria
2018-06-12 11:02 ` [PATCH v4 2/2] cpufreq: qcom-fw: Add support for QCOM cpufreq FW driver Taniya Das
2018-06-15 12:02   ` Amit Kucheria
2018-06-19  9:30   ` Viresh Kumar
2018-07-11 20:37   ` Matthias Kaehlcke
2018-07-12 18:06     ` Taniya Das

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