Re: [PATCH v4] KVM: LAPIC: Fix lapic timer injection delay

[Paolo Bonzini <pbonzini@redhat.com>]

On 29/06/2017 15:28, Wanpeng Li wrote:
> From: Wanpeng Li <wanpeng.li@hotmail.com>
> 
> If the TSC deadline timer is programmed really close to the deadline or 
> even in the past, the computation in vmx_set_hv_timer will program the 
> absolute target tsc value to vmcs preemption timer field w/ delta == 0, 
> then plays a vmentry and an upcoming vmx preemption timer fire vmexit 
> dance, the lapic timer injection is delayed due to this duration. Actually 
> the lapic timer which is emulated by hrtimer can handle this correctly.
> 
> This patch fixes it by firing the lapic timer and injecting a timer interrupt 
> immediately during the next vmentry if the TSC deadline timer is programmed
> really close to the deadline or even in the past. This saves ~300 cycles on 
> the tsc_deadline_timer test of apic.flat.
> 
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> Cc: Radim Krčmář <rkrcmar@redhat.com>
> Signed-off-by: Wanpeng Li <wanpeng.li@hotmail.com>

Thanks, looks good.  I'll post another refactoring of start_hv_timer for comments.

And unrelated to your patch, I think we need this:

@@ -1567,8 +1575,7 @@ void kvm_lapic_switch_to_sw_timer(struct kvm_vcpu *vcpu)
 		return;
 
 	cancel_hv_timer(apic);
-
-	if (atomic_read(&apic->lapic_timer.pending))
+	if (atomic_read(&apic->lapic_timer.pending) && !apic_lvtt_period(apic))
 		return;
 
 	if (apic_lvtt_period(apic) || apic_lvtt_oneshot(apic))

Paolo

> ---
>  arch/x86/kvm/lapic.c | 33 ++++++++++++++++++++-------------
>  arch/x86/kvm/vmx.c   |  6 +++++-
>  2 files changed, 25 insertions(+), 14 deletions(-)
> 
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index d24c874..40ad729 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -1504,21 +1504,28 @@ static void cancel_hv_timer(struct kvm_lapic *apic)
>  static bool start_hv_timer(struct kvm_lapic *apic)
>  {
>  	u64 tscdeadline = apic->lapic_timer.tscdeadline;
> +	bool need_cancel = apic->lapic_timer.hv_timer_in_use;
> +	if (!atomic_read(&apic->lapic_timer.pending) || apic_lvtt_period(apic)) {
> +		int r = kvm_x86_ops->set_hv_timer(apic->vcpu, tscdeadline);
> +		if (r >= 0) {
> +			need_cancel = false;
> +			apic->lapic_timer.hv_timer_in_use = true;
> +			hrtimer_cancel(&apic->lapic_timer.timer);
> +
> +			/* In case the sw timer triggered in the window */
> +			if (!apic_lvtt_period(apic)) {
> +				if (r || atomic_read(&apic->lapic_timer.pending)) {
> +					need_cancel = true;
> +					if (r)
> +						apic_timer_expired(apic);
> +				}
> +			}
> +		}
> +	}
>  
> -	if ((atomic_read(&apic->lapic_timer.pending) &&
> -		!apic_lvtt_period(apic)) ||
> -		kvm_x86_ops->set_hv_timer(apic->vcpu, tscdeadline)) {
> -		if (apic->lapic_timer.hv_timer_in_use)
> -			cancel_hv_timer(apic);
> -	} else {
> -		apic->lapic_timer.hv_timer_in_use = true;
> -		hrtimer_cancel(&apic->lapic_timer.timer);
> +	if (need_cancel)
> +		cancel_hv_timer(apic);
>  
> -		/* In case the sw timer triggered in the window */
> -		if (atomic_read(&apic->lapic_timer.pending) &&
> -			!apic_lvtt_period(apic))
> -			cancel_hv_timer(apic);
> -	}
>  	trace_kvm_hv_timer_state(apic->vcpu->vcpu_id,
>  			apic->lapic_timer.hv_timer_in_use);
>  	return apic->lapic_timer.hv_timer_in_use;
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 4263860..f8ccf8b 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -11158,7 +11158,11 @@ static int vmx_set_hv_timer(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc)
>  	vmx->hv_deadline_tsc = tscl + delta_tsc;
>  	vmcs_set_bits(PIN_BASED_VM_EXEC_CONTROL,
>  			PIN_BASED_VMX_PREEMPTION_TIMER);
> -	return 0;
> +
> +	if (delta_tsc == 0)
> +		return 1;
> +	else
> +		return 0;
>  }
>  
>  static void vmx_cancel_hv_timer(struct kvm_vcpu *vcpu)
>