From: Dave Hansen <dave.hansen@linux.intel.com>
To: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>,
Andy Lutomirski <luto@amacapital.net>
Cc: Ingo Molnar <mingo@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
Borislav Petkov <bp@suse.de>, Andy Lutomirski <luto@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
X86 ML <x86@kernel.org>,
linux-msdos@vger.kernel.org, wine-devel@winehq.org,
Adam Buchbinder <adam.buchbinder@gmail.com>,
Colin Ian King <colin.king@canonical.com>,
Lorenzo Stoakes <lstoakes@gmail.com>,
Qiaowei Ren <qiaowei.ren@intel.com>,
"Ravi V . Shankar" <ravi.v.shankar@intel.com>
Subject: Re: [v2 2/7] x86/mpx: Fail when implicit zero-displacement is used along with R/EBP
Date: Tue, 3 Jan 2017 08:41:50 -0800 [thread overview]
Message-ID: <2ef4ec41-b8f7-d775-aaff-02656b79a5dd@linux.intel.com> (raw)
In-Reply-To: <1482878000.106950.10.camel@ranerica-desktop>
On 12/27/2016 02:33 PM, Ricardo Neri wrote:
>>> diff --git a/arch/x86/mm/mpx.c b/arch/x86/mm/mpx.c
>>> index 6a75a75..71681d0 100644
>>> --- a/arch/x86/mm/mpx.c
>>> +++ b/arch/x86/mm/mpx.c
>>> @@ -120,6 +120,13 @@ static int get_reg_offset(struct insn *insn, struct pt_regs *regs,
>>>
>>> case REG_TYPE_BASE:
>>> regno = X86_SIB_BASE(insn->sib.value);
>>> + if (regno == 5 && X86_MODRM_RM(insn->modrm.value) == 0) {
>>> + WARN_ONCE(1, "An explicit displacement is required when %sBP used as SIB base.",
>>> + (IS_ENABLED(CONFIG_X86_64) && insn->x86_64) ?
>>> + "R13 or R" : "E");
>>> + return -EINVAL;
>>> + }
>>> +
>> Now that I've read the cover letter, I see what's going on. This
>> should not warn -- user code can easily trigger this deliberately.
> OK, I'll remove it. Are you concerned about the warning printing the
> calltrace, even only once?
Yes. We don't let userspace spam the kernel, even once. If we have a
couple thousand "only once" places, then userspace can overwhelm the
kernel log.
Also, this needs a much better description of what's going on in the
code. Could you add a comment explaining what's going on, and why
regno==5, etc...?
next prev parent reply other threads:[~2017-01-03 16:42 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-24 1:37 [v2 0/7] x86: enable User-Mode Instruction Prevention Ricardo Neri
2016-12-24 1:37 ` [v2 1/7] x86/mpx: Do not use SIB index if index points to R/ESP Ricardo Neri
2016-12-24 1:57 ` Andy Lutomirski
2016-12-27 22:29 ` Ricardo Neri
2016-12-24 1:37 ` [v2 2/7] x86/mpx: Fail when implicit zero-displacement is used along with R/EBP Ricardo Neri
2016-12-24 1:58 ` Andy Lutomirski
2016-12-27 22:33 ` Ricardo Neri
2017-01-03 16:41 ` Dave Hansen [this message]
2017-01-04 1:31 ` Ricardo Neri
2016-12-24 1:37 ` [v2 3/7] x86/mpx, x86/insn: Relocate insn util functions to a new insn-utils Ricardo Neri
2016-12-24 2:34 ` kbuild test robot
2016-12-25 6:17 ` Masami Hiramatsu
2016-12-27 22:36 ` Ricardo Neri
2017-01-03 16:44 ` Dave Hansen
2017-01-04 1:31 ` Ricardo Neri
2016-12-24 1:37 ` [v2 4/7] x86/cpufeature: Add User-Mode Instruction Prevention definitions Ricardo Neri
2016-12-24 1:37 ` [v2 5/7] x86: Add emulation code for UMIP instructions Ricardo Neri
2016-12-24 2:11 ` Andy Lutomirski
2016-12-28 0:39 ` Ricardo Neri
2016-12-28 0:48 ` Andy Lutomirski
2016-12-30 5:23 ` Ricardo Neri
2016-12-31 2:07 ` Andy Lutomirski
2017-01-04 1:30 ` Ricardo Neri
2016-12-25 15:49 ` Masami Hiramatsu
2016-12-28 0:40 ` Ricardo Neri
2016-12-24 1:37 ` [v2 6/7] x86/traps: Fixup general protection faults caused by UMIP Ricardo Neri
2016-12-24 2:11 ` Andy Lutomirski
2016-12-27 22:34 ` Ricardo Neri
2016-12-24 4:22 ` kbuild test robot
2016-12-24 1:37 ` [v2 7/7] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2016-12-24 3:15 ` kbuild test robot
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