From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S267770AbTGHWay (ORCPT ); Tue, 8 Jul 2003 18:30:54 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S267771AbTGHWay (ORCPT ); Tue, 8 Jul 2003 18:30:54 -0400 Received: from fmr01.intel.com ([192.55.52.18]:38382 "EHLO hermes.fm.intel.com") by vger.kernel.org with ESMTP id S267770AbTGHWak (ORCPT ); Tue, 8 Jul 2003 18:30:40 -0400 content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----_=_NextPart_001_01C34597.2464B138" X-MimeOLE: Produced By Microsoft Exchange V6.0.6375.0 Subject: [PATCH] idle using PNI monitor/mwait Date: Tue, 8 Jul 2003 14:23:14 -0700 Message-ID: <3014AAAC8E0930438FD38EBF6DCEB5640201719C@fmsmsx407.fm.intel.com> X-MS-Has-Attach: yes X-MS-TNEF-Correlator: Thread-Topic: [PATCH] idle using PNI monitor/mwait Thread-Index: AcNFlyL7p91F0SgJRRqQfUEtYB/TMg== From: "Nakajima, Jun" To: "Linus Torvalds" Cc: , "Saxena, Sunil" , "Mallick, Asit K" , "Pallipadi, Venkatesh" X-OriginalArrivalTime: 08 Jul 2003 21:23:17.0925 (UTC) FILETIME=[262B3550:01C34597] Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org This is a multi-part message in MIME format. ------_=_NextPart_001_01C34597.2464B138 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Linus, Attached is a patch that enables PNI (Prescott New Instructions) monitor/mwait in kernel idle (opcodes are now public). Basically MWAIT is similar to hlt, but you can avoid IPI to wake up the processor waiting. A write (by another processor) to the address range specified by MONITOR would wake up the processor waiting on MWAIT. Please apply. Thanks, Jun ---------------- diff -ur /build/orig/linux-2.5.74/arch/i386/kernel/cpu/intel.c linux-2.5.74/arch/i386/kernel/cpu/intel.c --- /build/orig/linux-2.5.74/arch/i386/kernel/cpu/intel.c 2003-07-02 13:43:55.000000000 -0700 +++ linux-2.5.74/arch/i386/kernel/cpu/intel.c 2003-07-08 09:18:28.000000000 -0700 @@ -13,6 +13,7 @@ =20 static int disable_P4_HT __initdata =3D 0; extern int trap_init_f00f_bug(void); +extern void select_idle_routine(const struct cpuinfo_x86 *c); =20 #ifdef CONFIG_X86_INTEL_USERCOPY /* @@ -172,7 +173,7 @@ } #endif =20 - + select_idle_routine(c); if (c->cpuid_level > 1) { /* supports eax=3D2 call */ int i, j, n; diff -ur /build/orig/linux-2.5.74/arch/i386/kernel/process.c linux-2.5.74/arch/i386/kernel/process.c --- /build/orig/linux-2.5.74/arch/i386/kernel/process.c 2003-07-02 13:38:40.000000000 -0700 +++ linux-2.5.74/arch/i386/kernel/process.c 2003-07-08 11:52:42.000000000 -0700 @@ -148,11 +148,56 @@ } } =20 +/* + * This uses new MONITOR/MWAIT instructions on P4 processors with PNI,=20 + * which can obviate IPI to trigger checking of need_resched. + * We execute MONITOR against need_resched and enter optimized wait state=20 + * through MWAIT. Whenever someone changes need_resched, we would be woken=20 + * up from MWAIT (without an IPI). + */ +static void mwait_idle (void) +{ + local_irq_enable(); + + if (!need_resched()) { + set_thread_flag(TIF_POLLING_NRFLAG); + do { + __monitor((void *)¤t_thread_info()->flags, 0, 0); + if (need_resched()) + break; + __mwait(0, 0); + } while (!need_resched()); + clear_thread_flag(TIF_POLLING_NRFLAG); + } +} + +void __init select_idle_routine(const struct cpuinfo_x86 *c) +{ + if (cpu_has(c, X86_FEATURE_MWAIT)) { + printk("Monitor/Mwait feature present.\n"); + /*=20 + * Skip, if setup has overridden idle. + * Also, take care of system with asymmetric CPUs. + * Use, mwait_idle only if all cpus support it. + * If not, we fallback to default_idle() + */ + if (!pm_idle) { + pm_idle =3D mwait_idle; + } + return; + } + pm_idle =3D default_idle; + return; +} + static int __init idle_setup (char *str) { if (!strncmp(str, "poll", 4)) { printk("using polling idle threads.\n"); pm_idle =3D poll_idle; + } else if (!strncmp(str, "halt", 4)) { + printk("using halt in idle threads.\n"); + pm_idle =3D default_idle; } =20 return 1; diff -ur /build/orig/linux-2.5.74/include/asm-i386/cpufeature.h linux-2.5.74/include/asm-i386/cpufeature.h --- /build/orig/linux-2.5.74/include/asm-i386/cpufeature.h 2003-07-02 13:51:50.000000000 -0700 +++ linux-2.5.74/include/asm-i386/cpufeature.h 2003-07-08 09:18:28.000000000 -0700 @@ -71,6 +71,8 @@ =20 /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ #define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */ +#define X86_FEATURE_MWAIT (4*32+ 3) /* Monitor/Mwait support */ + =20 /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ #define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */ diff -ur /build/orig/linux-2.5.74/include/asm-i386/processor.h linux-2.5.74/include/asm-i386/processor.h --- /build/orig/linux-2.5.74/include/asm-i386/processor.h 2003-07-02 13:40:24.000000000 -0700 +++ linux-2.5.74/include/asm-i386/processor.h 2003-07-08 09:18:28.000000000 -0700 @@ -272,6 +272,22 @@ #define pc98 0 #endif =20 +static __inline__ void __monitor(const void *eax, unsigned long ecx,=20 + unsigned long edx) +{ + /* "monitor %eax,%ecx,%edx;" */ + asm volatile( + ".byte 0x0f,0x01,0xc8;" + : :"a" (eax), "c" (ecx), "d"(edx)); +} + +static __inline__ void __mwait(unsigned long eax, unsigned long ecx) +{ + /* "mwait %eax,%ecx;" */ + asm volatile( + ".byte 0x0f,0x01,0xc9;" + : :"a" (eax), "c" (ecx)); +} =20 /* from system description table in BIOS. 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