From: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
To: unlisted-recipients:; (no To-header on input)
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
Rob Herring <robh+dt@kernel.org>, Wei Xu <xuwei5@hisilicon.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Subject: [PATCH 05/13] arm64: dts: hisilicon: Add HI3670 PCI-E controller support
Date: Tue, 2 Feb 2021 14:29:50 +0100 [thread overview]
Message-ID: <301bbde15f7a248222745c8ab98c0e20ae877db0.1612271903.git.mchehab+huawei@kernel.org> (raw)
In-Reply-To: <cover.1612271903.git.mchehab+huawei@kernel.org>
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Add PCI-E controller support for HiSilicon HI3670 SoC.
[mchehab+huawei@kernel.org: fix merge conflicts]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
---
arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 64 +++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
index 5522a5de07a8..c0a0336a8ea4 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
@@ -177,6 +177,12 @@ sctrl: sctrl@fff0a000 {
#clock-cells = <1>;
};
+ pmctrl: pmctrl@fff31000 {
+ compatible = "hisilicon,hi3670-pmctrl", "syscon";
+ reg = <0x0 0xfff31000 0x0 0x1000>;
+ #clock-cells = <1>;
+ };
+
iomcu: iomcu@ffd7e000 {
compatible = "hisilicon,hi3670-iomcu", "syscon";
reg = <0x0 0xffd7e000 0x0 0x1000>;
@@ -660,6 +666,64 @@ gpio28: gpio@fff1d000 {
clock-names = "apb_pclk";
};
+ its_pcie: interrupt-controller@f4000000 {
+ compatible = "arm,gic-v3-its";
+ msi-controller;
+ reg = <0x0 0xf5100000 0x0 0x100000>;
+ };
+
+ pcie@f4000000 {
+ compatible = "hisilicon,kirin970-pcie", "hisilicon,kirin960-pcie";
+ reg = <0x0 0xf4000000 0x0 0x1000000>,
+ <0x0 0xfc180000 0x0 0x1000>,
+ <0x0 0xfc000000 0x0 0x80000>,
+ <0x0 0xf5000000 0x0 0x2000>;
+ reg-names = "dbi", "apb", "phy", "config";
+ bus-range = <0x0 0x1>;
+ msi-parent = <&its_pcie>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x02000000 0x0 0x00000000
+ 0x0 0xf6000000
+ 0x0 0x02000000>;
+ num-lanes = <1>;
+ #interrupt-cells = <1>;
+ interrupts = <0 283 4>;
+ interrupt-names = "msi";
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0x0 0 0 1
+ &gic GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
+ <0x0 0 0 2
+ &gic GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
+ <0x0 0 0 3
+ &gic GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
+ <0x0 0 0 4
+ &gic GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&crg_ctrl HI3670_CLK_GATE_PCIEPHY_REF>,
+ <&crg_ctrl HI3670_CLK_GATE_PCIEAUX>,
+ <&crg_ctrl HI3670_PCLK_GATE_PCIE_PHY>,
+ <&crg_ctrl HI3670_PCLK_GATE_PCIE_SYS>,
+ <&crg_ctrl HI3670_ACLK_GATE_PCIE>;
+ clock-names = "pcie_phy_ref", "pcie_aux",
+ "pcie_apb_phy", "pcie_apb_sys",
+ "pcie_aclk";
+ switch,reset-gpios = <&gpio7 0 0 >;
+ eth,reset-gpios = <&gpio25 2 0 >;
+ m_2,reset-gpios = <&gpio3 1 0 >;
+ mini1,reset-gpios = <&gpio27 4 0 >;
+
+ eth,clkreq-gpios = <&gpio20 6 0 >;
+ m_2,clkreq-gpios = <&gpio27 3 0 >;
+ mini1,clkreq-gpios = <&gpio17 0 0 >;
+
+ /*vboost iboost pre post main*/
+ eye_param = <0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_clkreq_pmx_func &pcie_clkreq_cfg_func>;
+ };
+
/* UFS */
ufs: ufs@ff3c0000 {
compatible = "hisilicon,hi3670-ufs", "jedec,ufs-2.1";
--
2.29.2
next prev parent reply other threads:[~2021-02-02 13:43 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-02 13:29 [PATCH 00/13] Add support for Hikey 970 PCIe Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 01/13] doc: bindings: pci: designware-pcie.txt: convert it to yaml Mauro Carvalho Chehab
2021-02-02 17:44 ` Rob Herring
2021-02-03 6:49 ` Mauro Carvalho Chehab
2021-02-04 17:29 ` Rob Herring
2021-02-04 18:29 ` Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 02/13] doc: bindings: kirin-pcie.txt: " Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 03/13] doc: bindings: add new parameters used by Hikey 970 Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 04/13] pci: dwc: pcie-kirin: add HI3670 PCI-E controller support Mauro Carvalho Chehab
2021-02-02 13:29 ` Mauro Carvalho Chehab [this message]
2021-02-02 13:29 ` [PATCH 06/13] pci: dwc: pcie-kirin: simplify error handling logic Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 07/13] pci: dwc: pcie-kirin: simplify kirin 970 get resource logic Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 08/13] pci: dwc: pcie-kirin: place common init code altogether Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 09/13] pci: dwc: pcie-kirin: allow to optionally require a regulator Mauro Carvalho Chehab
2021-02-02 13:41 ` Mark Brown
2021-02-02 14:50 ` Mauro Carvalho Chehab
2021-02-02 16:02 ` Mark Brown
2021-02-02 13:29 ` [PATCH 10/13] pci: dwc: pcie-kirin: allow using multiple reset GPIOs Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 11/13] pci: dwc: pcie-kirin: add support for clkreq GPIOs Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 12/13] pci: dwc: pcie-kirin: cleanup kirin970_pcie_get_eyeparam() Mauro Carvalho Chehab
2021-02-02 13:29 ` [PATCH 13/13] arm64: dts: hisilicon: cleanup Hikey 970 PCI schema Mauro Carvalho Chehab
2021-02-02 14:48 ` [PATCH 00/13] Add support for Hikey 970 PCIe Bjorn Helgaas
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