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From: Reinette Chatre <reinette.chatre@intel.com>
To: dave.hansen@linux.intel.com, jarkko@kernel.org,
	tglx@linutronix.de, bp@alien8.de, luto@kernel.org,
	mingo@redhat.com, linux-sgx@vger.kernel.org, x86@kernel.org,
	shuah@kernel.org, linux-kselftest@vger.kernel.org
Cc: seanjc@google.com, kai.huang@intel.com, cathy.zhang@intel.com,
	cedric.xing@intel.com, haitao.huang@intel.com,
	mark.shanahan@intel.com, vijay.dhanraj@intel.com, hpa@zytor.com,
	linux-kernel@vger.kernel.org
Subject: [PATCH V4 06/31] x86/sgx: Export sgx_encl_ewb_cpumask()
Date: Wed, 13 Apr 2022 14:10:06 -0700	[thread overview]
Message-ID: <3091b3111f63c7aa5b206edd816d47aa5110dedb.1649878359.git.reinette.chatre@intel.com> (raw)
In-Reply-To: <cover.1649878359.git.reinette.chatre@intel.com>

Using sgx_encl_ewb_cpumask() to learn which CPUs might have executed
an enclave is useful to ensure that TLBs are cleared when changes are
made to enclave pages.

sgx_encl_ewb_cpumask() is used within the reclaimer when an enclave
page is evicted. The upcoming SGX2 support enables changes to be
made to enclave pages and will require TLBs to not refer to the
changed pages and thus will be needing sgx_encl_ewb_cpumask().

Relocate sgx_encl_ewb_cpumask() to be with the rest of the enclave
code in encl.c now that it is no longer unique to the reclaimer.

Take care to ensure that any future usage maintains the
current context requirement that ETRACK has been called first.
Expand the existing comments to highlight this while moving them
to a more prominent location before the function.

No functional change.

Reviewed-by: Jarkko Sakkinen <jarkko@kernel.org>
Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
---
Changes since V3:
- Add Jarkko's Reviewed-by tag.

Changes since V1:
- New patch split from original "x86/sgx: Use more generic name for
  enclave cpumask function" (Jarkko).
- Change subject line (Jarkko).
- Fixup kernel-doc to use brackets in function name.

 arch/x86/kernel/cpu/sgx/encl.c | 67 ++++++++++++++++++++++++++++++++++
 arch/x86/kernel/cpu/sgx/encl.h |  1 +
 arch/x86/kernel/cpu/sgx/main.c | 29 ---------------
 3 files changed, 68 insertions(+), 29 deletions(-)

diff --git a/arch/x86/kernel/cpu/sgx/encl.c b/arch/x86/kernel/cpu/sgx/encl.c
index 05ae1168391c..c6525eba74e8 100644
--- a/arch/x86/kernel/cpu/sgx/encl.c
+++ b/arch/x86/kernel/cpu/sgx/encl.c
@@ -613,6 +613,73 @@ int sgx_encl_mm_add(struct sgx_encl *encl, struct mm_struct *mm)
 	return 0;
 }
 
+/**
+ * sgx_encl_ewb_cpumask() - Query which CPUs might be accessing the enclave
+ * @encl: the enclave
+ *
+ * Some SGX functions require that no cached linear-to-physical address
+ * mappings are present before they can succeed. For example, ENCLS[EWB]
+ * copies a page from the enclave page cache to regular main memory but
+ * it fails if it cannot ensure that there are no cached
+ * linear-to-physical address mappings referring to the page.
+ *
+ * SGX hardware flushes all cached linear-to-physical mappings on a CPU
+ * when an enclave is exited via ENCLU[EEXIT] or an Asynchronous Enclave
+ * Exit (AEX). Exiting an enclave will thus ensure cached linear-to-physical
+ * address mappings are cleared but coordination with the tracking done within
+ * the SGX hardware is needed to support the SGX functions that depend on this
+ * cache clearing.
+ *
+ * When the ENCLS[ETRACK] function is issued on an enclave the hardware
+ * tracks threads operating inside the enclave at that time. The SGX
+ * hardware tracking require that all the identified threads must have
+ * exited the enclave in order to flush the mappings before a function such
+ * as ENCLS[EWB] will be permitted
+ *
+ * The following flow is used to support SGX functions that require that
+ * no cached linear-to-physical address mappings are present:
+ * 1) Execute ENCLS[ETRACK] to initiate hardware tracking.
+ * 2) Use this function (sgx_encl_ewb_cpumask()) to query which CPUs might be
+ *    accessing the enclave.
+ * 3) Send IPI to identified CPUs, kicking them out of the enclave and
+ *    thus flushing all locally cached linear-to-physical address mappings.
+ * 4) Execute SGX function.
+ *
+ * Context: It is required to call this function after ENCLS[ETRACK].
+ *          This will ensure that if any new mm appears (racing with
+ *          sgx_encl_mm_add()) then the new mm will enter into the
+ *          enclave with fresh linear-to-physical address mappings.
+ *
+ *          It is required that all IPIs are completed before a new
+ *          ENCLS[ETRACK] is issued so be sure to protect steps 1 to 3
+ *          of the above flow with the enclave's mutex.
+ *
+ * Return: cpumask of CPUs that might be accessing @encl
+ */
+const cpumask_t *sgx_encl_ewb_cpumask(struct sgx_encl *encl)
+{
+	cpumask_t *cpumask = &encl->cpumask;
+	struct sgx_encl_mm *encl_mm;
+	int idx;
+
+	cpumask_clear(cpumask);
+
+	idx = srcu_read_lock(&encl->srcu);
+
+	list_for_each_entry_rcu(encl_mm, &encl->mm_list, list) {
+		if (!mmget_not_zero(encl_mm->mm))
+			continue;
+
+		cpumask_or(cpumask, cpumask, mm_cpumask(encl_mm->mm));
+
+		mmput_async(encl_mm->mm);
+	}
+
+	srcu_read_unlock(&encl->srcu, idx);
+
+	return cpumask;
+}
+
 static struct page *sgx_encl_get_backing_page(struct sgx_encl *encl,
 					      pgoff_t index)
 {
diff --git a/arch/x86/kernel/cpu/sgx/encl.h b/arch/x86/kernel/cpu/sgx/encl.h
index 6b34efba1602..d2acb4debde5 100644
--- a/arch/x86/kernel/cpu/sgx/encl.h
+++ b/arch/x86/kernel/cpu/sgx/encl.h
@@ -105,6 +105,7 @@ int sgx_encl_may_map(struct sgx_encl *encl, unsigned long start,
 
 void sgx_encl_release(struct kref *ref);
 int sgx_encl_mm_add(struct sgx_encl *encl, struct mm_struct *mm);
+const cpumask_t *sgx_encl_ewb_cpumask(struct sgx_encl *encl);
 int sgx_encl_get_backing(struct sgx_encl *encl, unsigned long page_index,
 			 struct sgx_backing *backing);
 void sgx_encl_put_backing(struct sgx_backing *backing, bool do_write);
diff --git a/arch/x86/kernel/cpu/sgx/main.c b/arch/x86/kernel/cpu/sgx/main.c
index 8e4bc6453d26..2de85f459492 100644
--- a/arch/x86/kernel/cpu/sgx/main.c
+++ b/arch/x86/kernel/cpu/sgx/main.c
@@ -203,35 +203,6 @@ static void sgx_ipi_cb(void *info)
 {
 }
 
-static const cpumask_t *sgx_encl_ewb_cpumask(struct sgx_encl *encl)
-{
-	cpumask_t *cpumask = &encl->cpumask;
-	struct sgx_encl_mm *encl_mm;
-	int idx;
-
-	/*
-	 * Can race with sgx_encl_mm_add(), but ETRACK has already been
-	 * executed, which means that the CPUs running in the new mm will enter
-	 * into the enclave with a fresh epoch.
-	 */
-	cpumask_clear(cpumask);
-
-	idx = srcu_read_lock(&encl->srcu);
-
-	list_for_each_entry_rcu(encl_mm, &encl->mm_list, list) {
-		if (!mmget_not_zero(encl_mm->mm))
-			continue;
-
-		cpumask_or(cpumask, cpumask, mm_cpumask(encl_mm->mm));
-
-		mmput_async(encl_mm->mm);
-	}
-
-	srcu_read_unlock(&encl->srcu, idx);
-
-	return cpumask;
-}
-
 /*
  * Swap page to the regular memory transformed to the blocked state by using
  * EBLOCK, which means that it can no longer be referenced (no new TLB entries).
-- 
2.25.1


  parent reply	other threads:[~2022-04-13 21:13 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-13 21:10 [PATCH V4 00/31] x86/sgx and selftests/sgx: Support SGX2 Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 01/31] x86/sgx: Add short descriptions to ENCLS wrappers Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 02/31] x86/sgx: Add wrapper for SGX2 EMODPR function Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 03/31] x86/sgx: Add wrapper for SGX2 EMODT function Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 04/31] x86/sgx: Add wrapper for SGX2 EAUG function Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 05/31] x86/sgx: Support loading enclave page without VMA permissions check Reinette Chatre
2022-04-13 21:10 ` Reinette Chatre [this message]
2022-04-13 21:10 ` [PATCH V4 07/31] x86/sgx: Rename sgx_encl_ewb_cpumask() as sgx_encl_cpumask() Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 08/31] x86/sgx: Move PTE zap code to new sgx_zap_enclave_ptes() Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 09/31] x86/sgx: Make sgx_ipi_cb() available internally Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 10/31] x86/sgx: Create utility to validate user provided offset and length Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 11/31] x86/sgx: Keep record of SGX page type Reinette Chatre
2022-04-14 11:12   ` Jarkko Sakkinen
2022-04-14 16:27     ` Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 12/31] x86/sgx: Export sgx_encl_{grow,shrink}() Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 13/31] x86/sgx: Export sgx_encl_page_alloc() Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 14/31] x86/sgx: Support VA page allocation without reclaiming Reinette Chatre
2022-04-14 11:18   ` Jarkko Sakkinen
2022-04-14 16:30     ` Reinette Chatre
2022-04-15 13:54       ` Haitao Huang
2022-04-15 15:22         ` Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 15/31] x86/sgx: Support restricting of enclave page permissions Reinette Chatre
2022-04-14 11:19   ` Jarkko Sakkinen
2022-04-14 11:19     ` Jarkko Sakkinen
2022-04-14 16:31       ` Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 16/31] x86/sgx: Support adding of pages to an initialized enclave Reinette Chatre
2022-04-14 11:20   ` Jarkko Sakkinen
2022-04-14 16:31     ` Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 17/31] x86/sgx: Tighten accessible memory range after enclave initialization Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 18/31] x86/sgx: Support modifying SGX page type Reinette Chatre
2022-04-14 11:11   ` Jarkko Sakkinen
2022-04-14 16:32     ` Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 19/31] x86/sgx: Support complete page removal Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 20/31] x86/sgx: Free up EPC pages directly to support large page ranges Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 21/31] Documentation/x86: Introduce enclave runtime management section Reinette Chatre
2022-04-14 11:21   ` Jarkko Sakkinen
2022-04-14 16:32     ` Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 22/31] selftests/sgx: Add test for EPCM permission changes Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 23/31] selftests/sgx: Add test for TCS page " Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 24/31] selftests/sgx: Test two different SGX2 EAUG flows Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 25/31] selftests/sgx: Introduce dynamic entry point Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 26/31] selftests/sgx: Introduce TCS initialization enclave operation Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 27/31] selftests/sgx: Test complete changing of page type flow Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 28/31] selftests/sgx: Test faulty enclave behavior Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 29/31] selftests/sgx: Test invalid access to removed enclave page Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 30/31] selftests/sgx: Test reclaiming of untouched page Reinette Chatre
2022-04-13 21:10 ` [PATCH V4 31/31] selftests/sgx: Page removal stress test Reinette Chatre
2022-04-14 11:25 ` [PATCH V4 00/31] x86/sgx and selftests/sgx: Support SGX2 Jarkko Sakkinen
2022-04-14 16:34   ` Reinette Chatre
2022-04-14 16:55     ` Jarkko Sakkinen
2022-04-14 18:35       ` Dhanraj, Vijay
2022-04-17 14:58         ` Jarkko Sakkinen
2022-04-21 23:46           ` Dhanraj, Vijay
2022-04-22  3:29             ` Reinette Chatre
2022-04-22  9:16               ` Jarkko Sakkinen
2022-04-22 13:17                 ` Jarkko Sakkinen
2022-04-25 20:17                 ` Dhanraj, Vijay
2022-04-25 23:56                   ` Reinette Chatre
2022-04-26  4:10                     ` Jarkko Sakkinen
2022-04-22  9:14             ` Jarkko Sakkinen

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