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Subject: Re: [RFC PATCH v0.2] PCI: Add support for tango PCIe host bridge
To: Marc Zyngier <marc.zyngier@arm.com>,
        Thomas Gleixner <tglx@linutronix.de>
Cc: Bjorn Helgaas <helgaas@kernel.org>,
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From: Mason <slash.tmp@free.fr>
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Date: Tue, 11 Apr 2017 17:13:35 +0200
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On 27/03/2017 19:09, Marc Zyngier wrote:

> Here's what your system looks like:
> 
> PCI-EP -------> MSI Controller ------> INTC
>          MSI                    IRQ
> 
> A PCI MSI is always edge. No ifs, no buts. That's what it is, and nothing
> else. Now, your MSI controller signals its output using a level interrupt,
> since you need to whack it on the head so that it lowers its line.
> 
> There is not a single trigger, because there is not a single interrupt.

Hello Marc,

I was hoping you or Thomas might help clear some confusion
in my mind around IRQ domains (struct irq_domain).

I have read https://www.kernel.org/doc/Documentation/IRQ-domain.txt

IIUC, there should be one IRQ domain per IRQ controller.

I have this MSI controller handling 256 interrupts, so I should
have *one* domain for all possible MSIs. Yet the Altera driver
registers *two* domains (msi_domain and inner_domain).

Could I make everything work with a single IRQ domain?

I'm confused by the sequence:

  irq_dom = irq_domain_create_linear(fwnode, MSI_COUNT, &msi_dom_ops, pcie);
  msi_dom = pci_msi_create_irq_domain(fwnode, &msi_domain_info, irq_dom);

It seems I should be able to call only pci_msi_create_irq_domain...
And the parent of the MSI controller is given in the DT.

I'm not quite sure how I tell pci_msi_create_irq_domain how many
MSIs it's supposed to manage. Nor how I pass my private struct.

I will keep looking.

Regards.