From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932364AbcBHQdj (ORCPT ); Mon, 8 Feb 2016 11:33:39 -0500 Received: from mout.kundenserver.de ([212.227.126.131]:61537 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932297AbcBHQdd (ORCPT ); Mon, 8 Feb 2016 11:33:33 -0500 From: Arnd Bergmann To: Gabriele Paoloni Cc: "linux-arm-kernel@lists.infradead.org" , "Guohanjun (Hanjun Guo)" , "Wangzhou (B)" , "liudongdong (C)" , Linuxarm , qiujiang , "bhelgaas@google.com" , "Lorenzo.Pieralisi@arm.com" , "tn@semihalf.com" , "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "xuwei (O)" , "linux-acpi@vger.kernel.org" , "jcm@redhat.com" , zhangjukuo , "Liguozhu (Kenneth)" Subject: Re: [RFC PATCH v2 1/3] PCI: hisi: re-architect Hip05/Hip06 controllers driver to preapare for ACPI Date: Mon, 08 Feb 2016 17:32:48 +0100 Message-ID: <3113837.YSNyDAf4HQ@wuerfel> User-Agent: KMail/4.11.5 (Linux/3.16.0-10-generic; KDE/4.11.5; x86_64; ; ) In-Reply-To: References: <1454935264-6076-1-git-send-email-gabriele.paoloni@huawei.com> <2409806.1aGBrN4l0X@wuerfel> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:4fXrDjWzY12tKMXJ925Tb0+aIIfZn309XJJQ0gpLPKTNHVnW2VZ UGRci8SDRxgOf2GBU4GBfliXJVQ7zha8MNnrweL0M/izD3SBjhVZjuCQ4xcxykN1n1kPIpq 6fjr9wszWfsn7N301a3Mamv2d5N+MLrJsKvVAjKqXBtR9kA4wI8R43LhwjMNZg3bci3hDdz 7qN6uI10OehDjHA6G3eeA== X-UI-Out-Filterresults: notjunk:1;V01:K0:cCXhLA3JvpI=:h0lu7AAk7qndgTwOQeH2ia PXlj2GlTbL9stS4v/cJHjEUr4HJsn7h5afbk4IeO5UVuhc+a0kB9QKTG8jafAnbrj90Qn7S8Q cTEzeciyXbYGdcBCpVG90QB8ASMd48ks5bZuyVjB2vgAKM3mQtPurU8+pKIZ8lyMSMnIxkC+C h9jqVwKLPC/gxr+iP+VwBNrXtfgbCL0FnTfVv/eRLepSRT1ssdt+L/WvoaknctQLPYsjp05f1 t9X3jcskRO9/Q2fdlAAkuq+2toXzCdh6Rk4TvpAxO9S/hOGx6HOMelvdA/JEqMnF9TMdIeDq4 1PMG2QIrXqeBYt6lEOM/zk/DiurvKMXiPh2Ym4l7pYdlcG1wgIzY/yODw1B1iLvfzjdJ4O63U guhVjXOxB9xhA9OfMsaefnHJUWKbUD+Ywe4Yfqi1QoStkB4REHNKWQcosXoVL2Ze2lsbT7uUw 18xFKxTc0Nr/zdCzy4e/7T5cAxwMJlIYkShKj9oFejxyQk0+9/8ngM9NvuEs6095oF0poHnW6 3s8Ex5scUnvHnUoZOnUJsYFQxVBK2H1pTIT1gmGKOJCsfkRyBdSVgQJJJCmUbVXbmipprmtUD QyfwvgFD1/KWsgA4mpxiTJm2c5C42QpANQ1UESXwolncGaRZP7pk4FQIEDHS0x+UGKPzRuex9 KNny2w4X5bIb8pLd4gKh23vWokR5fpyDJXW5w0k2LfGo2fKF/OIdc2mnrdWlRCVIlCoBjv8na GWkpUcQqeu+2w+Mj Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Monday 08 February 2016 16:06:54 Gabriele Paoloni wrote: > > > > On Monday 08 February 2016 12:41:02 Gabriele Paoloni wrote: > > > + > > > +/* HipXX PCIe host only supports 32-bit config access */ > > > +int hisi_pcie_common_cfg_read(void __iomem *reg_base, int where, int > > size, > > > + u32 *val) > > > +{ > > > + u32 reg; > > > + u32 reg_val; > > > + void *walker = ®_val; > > > + > > > + walker += (where & 0x3); > > > + reg = where & ~0x3; > > > + reg_val = readl(reg_base + reg); > > > + > > > + if (size == 1) > > > + *val = *(u8 __force *) walker; > > > + else if (size == 2) > > > + *val = *(u16 __force *) walker; > > > + else if (size == 4) > > > + *val = reg_val; > > > + else > > > + return PCIBIOS_BAD_REGISTER_NUMBER; > > > + > > > + return PCIBIOS_SUCCESSFUL; > > > +} > > > > Isn't this the same hack that Qualcomm are using? > > As far as I can see Qualcomm defines its own config access > mechanism only for RC config read and also it seems they're > having problems with reporting the device class... > > https://github.com/torvalds/linux/blob/master/drivers/pci/host/pcie-qcom.c#L474 > > Our problem is that our HW can only perform 32b rd/wr accesses > So we can't use readw/readb/writew/writeb... > > Sorry, my mistake, I meant Cavium not Qualcomm. See https://lkml.org/lkml/2016/2/5/689 for the patches. Arnd