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From: Patrice CHOTARD <patrice.chotard@foss.st.com>
To: Pratyush Yadav <p.yadav@ti.com>
Cc: Mark Brown <broonie@kernel.org>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Boris Brezillon <boris.brezillon@collabora.com>,
	<linux-mtd@lists.infradead.org>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	<linux-spi@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <christophe.kerello@foss.st.com>
Subject: Re: [PATCH v3 3/3] mtd: spinand: add SPI-NAND MTD resume handler
Date: Fri, 28 May 2021 14:51:44 +0200	[thread overview]
Message-ID: <3238725c-d7ff-c000-23d1-f18298e1556f@foss.st.com> (raw)
In-Reply-To: <20210528120508.f6viglv3gkzgweqq@ti.com>

Hi Pratyush

On 5/28/21 2:05 PM, Pratyush Yadav wrote:
> On 27/05/21 06:12PM, patrice.chotard@foss.st.com wrote:
>> From: Patrice Chotard <patrice.chotard@foss.st.com>
>>
>> After power up, all SPI NAND's blocks are locked. Only read operations
>> are allowed, write and erase operations are forbidden.
>> The SPI NAND framework unlocks all the blocks during its initialization.
>>
>> During a standby low power, the memory is powered down, losing its
>> configuration.
>> During the resume, the QSPI driver state is restored but the SPI NAND
>> framework does not reconfigured the memory.
>>
>> This patch adds SPI-NAND MTD PM handlers for resume ops.
>> SPI NAND resume op re-initializes SPI NAND flash to its probed state.
>>
>> Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
>> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
>> ---
>> Changes in v3:
>>   - Add spinand_read_cfg() call to repopulate cache
>>
>> Changes in v2:
>>   - Add helper spinand_block_unlock().
>>   - Add spinand_ecc_enable() call.
>>   - Remove some dev_err().
>>   - Fix commit's title and message.
>>
>>  drivers/mtd/nand/spi/core.c | 33 +++++++++++++++++++++++++++++++++
>>  1 file changed, 33 insertions(+)
>>
>> diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
>> index 1f699ad84f1b..e3fcbcf381c3 100644
>> --- a/drivers/mtd/nand/spi/core.c
>> +++ b/drivers/mtd/nand/spi/core.c
>> @@ -1099,6 +1099,38 @@ static int spinand_block_unlock(struct spinand_device *spinand)
>>  	return ret;
>>  }
>>  
>> +static void spinand_mtd_resume(struct mtd_info *mtd)
>> +{
>> +	struct spinand_device *spinand = mtd_to_spinand(mtd);
>> +	int ret;
>> +
>> +	ret = spinand_reset_op(spinand);
>> +	if (ret)
>> +		return;
>> +
>> +	ret = spinand_read_cfg(spinand);
>> +	if (ret)
>> +		return;
>> +
>> +	ret = spinand_init_quad_enable(spinand);
>> +	if (ret)
>> +		return;
>> +
>> +	ret = spinand_upd_cfg(spinand, CFG_OTP_ENABLE, 0);
>> +	if (ret)
>> +		return;
>> +
>> +	ret = spinand_manufacturer_init(spinand);
>> +	if (ret)
>> +		return;
>> +
>> +	ret = spinand_block_unlock(spinand);
>> +	if (ret)
>> +		return;
>> +
>> +	spinand_ecc_enable(spinand, false);
>> +}
>> +
> 
> I don't think you quite get what me and Miquel are suggesting.
> 
> The helper should call all these functions like read_cfg() 
> quad_enable(), etc. So it should look something like:

Yes, this series was sent too quickly on my side, and i misunderstood 
what you suggested, sorry for that.

> 
> int spinand_init_flash()
> {
> 	ret = spinand_read_cfg(spinand);
> 	if (ret)
> 		return;
> 

The new helper spinand_read_cfg() must not be called in spinand_init_flash()
but directly in spinand_resume().
This because spinand_read_cfg() only performs a REG_CFG read without doing the
memory allocation of spinand->cfg_cache.

In spinand_init(), spinand_init_cfg_cache() must be called as previously as it does spinand->cfg_cache
memory allocation and call the new helper spinand_read_cfg(). 
Then after, spinand_init_flash() can be called.

> 	ret = spinand_init_quad_enable(spinand);
> 	if (ret)
> 		return;
> 
> 	ret = spinand_upd_cfg(spinand, CFG_OTP_ENABLE, 0);
> 	if (ret)
> 		return;
> 
> 	ret = spinand_manufacturer_init(spinand);
> 	if (ret)
> 		return;
> 
> 	ret = spinand_block_unlock(spinand);
> 	if (ret)
> 		return;
> 
> 	spinand_ecc_enable(spinand, false);
> }
> 
> Then spinand_mtd_resume should look something like:
> 
> int spinand_mtd_resume()
> {
> 	ret = spinand_reset_op(spinand);
> 	if (ret)
> 		return;
> 
> 	return spinand_init_flash();
> }
> 
> And spinand_init() should look something like:
> 
> int spinand_init()
> {
> 	...
> 	spinand->oobbuf = ...
> 
> 	spinand_init_flash();
> 
> 	spinand_create_dirmaps();
> 
> 	...

As explained just above, spinand_init() will look like :

int spinand_init()
{
	...
	spinand->oobbuf = ...

	spinand_init_cfg_cache();     => perform cfg cache memory allocation and read the REG_CFG

	spinand_init_flash();

	spinand_create_dirmaps();

> }
> 
> 
>>  static int spinand_init(struct spinand_device *spinand)
>>  {
>>  	struct device *dev = &spinand->spimem->spi->dev;
>> @@ -1186,6 +1218,7 @@ static int spinand_init(struct spinand_device *spinand)
>>  	mtd->_block_isreserved = spinand_mtd_block_isreserved;
>>  	mtd->_erase = spinand_mtd_erase;
>>  	mtd->_max_bad_blocks = nanddev_mtd_max_bad_blocks;
>> +	mtd->_resume = spinand_mtd_resume;
>>  
>>  	if (nand->ecc.engine) {
>>  		ret = mtd_ooblayout_count_freebytes(mtd);
>> -- 
>> 2.17.1
> 

Thanks
Patrice

  reply	other threads:[~2021-05-28 12:52 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-27 16:12 [PATCH v3 0/3] " patrice.chotard
2021-05-27 16:12 ` [PATCH v3 1/3] mtd: spinand: Add spinand_block_unlock() helper patrice.chotard
2021-05-27 16:12 ` [PATCH v3 2/3] mtd: spinand: add spinand_read_cfg() helper patrice.chotard
2021-05-27 16:12 ` [PATCH v3 3/3] mtd: spinand: add SPI-NAND MTD resume handler patrice.chotard
2021-05-27 16:23   ` Miquel Raynal
2021-05-28  8:22     ` Patrice CHOTARD
2021-05-28 12:05   ` Pratyush Yadav
2021-05-28 12:51     ` Patrice CHOTARD [this message]
2021-05-28 13:17       ` Pratyush Yadav
2021-05-28 14:31         ` Patrice CHOTARD

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