linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Michal Simek <michal.simek@xilinx.com>
To: Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
	Vinod Koul <vkoul@kernel.org>
Cc: linux-kernel@vger.kernel.org,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>,
	Michal Simek <michal.simek@xilinx.com>
Subject: Re: [PATCH v8 2/3] phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver
Date: Thu, 25 Jun 2020 08:39:56 +0200	[thread overview]
Message-ID: <334fc22f-2b29-7924-ed03-def63aa78d7e@xilinx.com> (raw)
In-Reply-To: <20200624211458.GA29023@pendragon.ideasonboard.com>

Hi Laurent and Vinod,

On 24. 06. 20 23:14, Laurent Pinchart wrote:
> Hi Vinod,
> 
> On Wed, Jun 24, 2020 at 10:56:35PM +0530, Vinod Koul wrote:
>> On 24-06-20, 19:39, Laurent Pinchart wrote:
>>
>>>>> +/* Number of GT lanes */
>>>>> +#define NUM_LANES			4
>>>>
>>>> Should this be coded in driver like this? Maybe future versions of
>>>> hardware will have more lanes..? Why not describe this in DT?
>>>
>>> This macro is used to avoid hardcoding 4 in the driver, to make sure
>>> that all the code that deal with the number of lanes use a consistent
>>> value and is readable. There's no foreseen new version of the IP that
>>> would have more lane, so I don't think this should go in DT. Otherwise
>>> we'd have to encode there pretty much any parameter that could one day
>>> possibly change in a different universe :-)
>>>
>>> Let's also note that even when parameters change between IP versions, it
>>> doesn't always make sense to specify them explicitly in DT. It's totally
>>> fine to have a table of parameter values in the driver, indexed by
>>> compatible string. Whether to set a parameter explicitly in DT or handle
>>> it in the driver usually depends on how frequently that parameter can
>>> change, if it can vary between different integrations of the same IP
>>> version, ...
>>>
>>> In this specific case, as there's no foreseen change, we can't really
>>> tell how it would change if it did one day. I thus think hardcoding the
>>> parameter in the driver is fine, and in the worst case, we can add a
>>> parameter in DT later and default to 4 if not specified. Same reasoning
>>> for CONTROLLERS_PER_LANE.
>>
>> yeah not every parameter can be coded and we should use compatible as
>> well, but I would disagree with no future revision planned. It will
>> happen not now, but sometime in year or so :) Been around devices has
>> taught me that only constant thing is change in hardware!
> 
> I don't dispute it will not happen, my point is that, without a new
> revision planned, we don't have enough information to tell which option
> would be best to support future revisions. As I know we won't be blocked
> (both compat string matching and adding new optional properties with
> appropriate defaults will be viable options), I'm not concerned.

I also don't think this should got to DT. If there is any change in
number of lanes in future very likely there will be also different
changes connected to that as well. Then we can have discussion if makes
sense to even use this driver or write different one because of
different feature set and handling.
Also if IP doesn't change still it can become optional DT parameter with
default to 4 if not defined.

Thanks,
Michal


  reply	other threads:[~2020-06-25  6:40 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-13 17:22 [PATCH v8 0/3] phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver Laurent Pinchart
2020-05-13 17:22 ` [PATCH v8 1/3] dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY Laurent Pinchart
2020-05-19  8:29   ` Kishon Vijay Abraham I
2020-05-26 18:32   ` Rob Herring
2020-05-28  1:55     ` Laurent Pinchart
2020-06-10 17:05       ` Laurent Pinchart
2020-05-13 17:22 ` [PATCH v8 2/3] phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver Laurent Pinchart
2020-06-24 15:11   ` Vinod Koul
2020-06-24 16:39     ` Laurent Pinchart
2020-06-24 17:26       ` Vinod Koul
2020-06-24 21:14         ` Laurent Pinchart
2020-06-25  6:39           ` Michal Simek [this message]
2020-06-24 16:44   ` [PATCH v8.1 " Laurent Pinchart
2020-05-13 17:22 ` [PATCH v8 3/3] arm64: dts: zynqmp: Add GTR transceivers Laurent Pinchart
2020-06-29  9:39 ` [PATCH v8 0/3] phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver Vinod Koul
2020-06-29 12:02   ` Laurent Pinchart

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=334fc22f-2b29-7924-ed03-def63aa78d7e@xilinx.com \
    --to=michal.simek@xilinx.com \
    --cc=anurag.kumar.vulisha@xilinx.com \
    --cc=kishon@ti.com \
    --cc=laurent.pinchart@ideasonboard.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).