From: Marek Szyprowski <m.szyprowski@samsung.com>
To: Marc Zyngier <maz@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Will Deacon <will@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Russell King <linux@arm.linux.org.uk>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Sumit Garg <sumit.garg@linaro.org>,
Valentin Schneider <Valentin.Schneider@arm.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Gregory Clement <gregory.clement@bootlin.com>,
Andrew Lunn <andrew@lunn.ch>,
Saravana Kannan <saravanak@google.com>,
kernel-team@android.com,
'Linux Samsung SOC' <linux-samsung-soc@vger.kernel.org>,
Krzysztof Kozlowski <krzk@kernel.org>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Subject: Re: [PATCH v3 08/16] irqchip/gic: Configure SGIs as standard interrupts
Date: Tue, 15 Sep 2020 08:48:02 +0200 [thread overview]
Message-ID: <33e3ef7c-44e9-a509-74ad-c2e39779fd9d@samsung.com> (raw)
In-Reply-To: <14e2c690bf99280588538989014c7356@kernel.org>
Hi Marc,
On 14.09.2020 17:09, Marc Zyngier wrote:
> On 2020-09-14 14:26, Marek Szyprowski wrote:
>> On 14.09.2020 15:13, Marc Zyngier wrote:
>>> On 2020-09-14 14:06, Marek Szyprowski wrote:
>>>> On 01.09.2020 16:43, Marc Zyngier wrote:
>>>>> Change the way we deal with GIC SGIs by turning them into proper
>>>>> IRQs, and calling into the arch code to register the interrupt range
>>>>> instead of a callback.
>>>>>
>>>>> Reviewed-by: Valentin Schneider <valentin.schneider@arm.com>
>>>>> Signed-off-by: Marc Zyngier <maz@kernel.org>
>>>> This patch landed in linux next-20200914 as commit ac063232d4b0
>>>> ("irqchip/gic: Configure SGIs as standard interrupts"). Sadly it
>>>> breaks
>>>> booting of all Samsung Exynos 4210/4412 based boards (dual/quad ARM
>>>> Cortex A9 based). Here are the last lines from the bootlog:
>>>>
>>>> [ 0.106322] CPU: Testing write buffer coherency: ok
>>>> [ 0.109895] CPU0: Spectre v2: using BPIALL workaround
>>>> [ 0.116057] CPU0: thread -1, cpu 0, socket 9, mpidr 80000900
>>>> [ 0.123885] Setting up static identity map for 0x40100000 -
>>>> 0x40100060
>>>> [ 0.130191] rcu: Hierarchical SRCU implementation.
>>>> [ 0.137195] soc soc0: Exynos: CPU[EXYNOS4210] PRO_ID[0x43210211]
>>>> REV[0x11] Detected
>>>> [ 0.145129] smp: Bringing up secondary CPUs ...
>>>> [ 0.156279] CPU1: thread -1, cpu 1, socket 9, mpidr 80000901
>>>> [ 0.156291] CPU1: Spectre v2: using BPIALL workaround
>>>> [ 2.716379] random: fast init done
>>>
>>> Thanks for the report. Is this the funky non-banked GIC?
>>
>> Both Exynos 4210 and 4412 use non-zero cpu-offset in GIC node in
>> device-tree: arch/arm/boot/dts/exynos{4210,4412}.dtsi, so I assume that
>> the GIC registers are not banked.
>
> Annoyingly, it seems to work correctly in QEMU:
>
> root@unassigned-hostname:~# cat /proc/interrupts
> CPU0 CPU1
> 40: 0 0 GIC-0 89 Level mct_comp_irq
> 41: 16144 0 GIC-0 74 Level mct_tick0
> 42: 0 15205 GIC-0 80 Level mct_tick1
> 43: 0 0 COMBINER 18 Edge arm-pmu
> 44: 0 0 COMBINER 26 Edge arm-pmu
> 46: 2270 0 GIC-0 107 Level mmc0
> 48: 878 0 GIC-0 84 Level 13800000.serial
> 52: 0 0 GIC-0 90 Level 13860000.i2c
> 54: 0 0 GIC-0 67 Level 12680000.pdma
> 55: 0 0 GIC-0 68 Level 12690000.pdma
> 56: 0 0 GIC-0 66 Level 12850000.mdma
> 59: 0 0 COMBINER 45 Edge 13620000.sysmmu
> 60: 0 0 COMBINER 46 Edge 13630000.sysmmu
> 61: 0 0 COMBINER 44 Edge 12e20000.sysmmu
> 62: 0 0 COMBINER 34 Edge 11a20000.sysmmu
> 63: 0 0 COMBINER 35 Edge 11a30000.sysmmu
> 64: 0 0 COMBINER 36 Edge 11a40000.sysmmu
> 65: 0 0 COMBINER 37 Edge 11a50000.sysmmu
> 66: 0 0 COMBINER 38 Edge 11a60000.sysmmu
> 67: 0 0 COMBINER 40 Edge 12a30000.sysmmu
> 68: 0 0 COMBINER 42 Edge 11e20000.sysmmu
> 74: 0 0 GIC-0 79 Level 11400000.pinctrl
> 75: 0 0 GIC-0 78 Level 11000000.pinctrl
> 77: 0 0 COMBINER 39 Edge 12a20000.sysmmu
> 78: 0 0 COMBINER 43 Edge 12220000.sysmmu
> IPI0: 0 1 CPU wakeup interrupts
> IPI1: 0 0 Timer broadcast interrupts
> IPI2: 32 63 Rescheduling interrupts
> IPI3: 3925 5381 Function call interrupts
> IPI4: 0 0 CPU stop interrupts
> IPI5: 4375 3778 IRQ work interrupts
> IPI6: 0 0 completion interrupts
> Err: 0
>
> Do you happen to know whether the QEMU emulation is trustworthy?
I didn't play much with Exynos emulation on QEMU. All I know is that
this patch simply doesn't work on the real hw.
If there is anything to check or test, let me know. I will try to help
as much as possible.
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
next prev parent reply other threads:[~2020-09-15 6:48 UTC|newest]
Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-01 14:43 [PATCH v3 00/16] arm/arm64: Turning IPIs into normal interrupts Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 01/16] genirq: Add fasteoi IPI flow Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 02/16] genirq: Allow interrupts to be excluded from /proc/interrupts Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 03/16] arm64: Allow IPIs to be handled as normal interrupts Marc Zyngier
2020-09-11 15:05 ` Catalin Marinas
2020-10-19 12:42 ` Vincent Guittot
2020-10-19 13:04 ` Marc Zyngier
2020-10-19 15:43 ` Vincent Guittot
2020-10-19 16:00 ` Valentin Schneider
2020-10-27 10:12 ` Vincent Guittot
2020-10-27 10:37 ` Marc Zyngier
2020-10-27 10:50 ` Vincent Guittot
2020-10-27 11:21 ` Vincent Guittot
2020-10-27 12:06 ` Marc Zyngier
2020-10-27 13:17 ` Vincent Guittot
[not found] ` <c66367b0-e8a0-2b7b-13c3-c9413462357c@huawei.com>
2021-05-06 11:44 ` Marc Zyngier
2021-05-07 7:30 ` He Ying
2021-05-07 8:56 ` Marc Zyngier
2021-05-07 9:31 ` He Ying
2020-09-01 14:43 ` [PATCH v3 04/16] ARM: " Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 05/16] irqchip/gic-v3: Describe the SGI range Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 06/16] irqchip/gic-v3: Configure SGIs as standard interrupts Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 07/16] irqchip/gic: Refactor SMP configuration Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 08/16] irqchip/gic: Configure SGIs as standard interrupts Marc Zyngier
[not found] ` <CGME20200914130601eucas1p23ce276d168dee37909b22c75499e68da@eucas1p2.samsung.com>
2020-09-14 13:06 ` Marek Szyprowski
2020-09-14 13:13 ` Marc Zyngier
2020-09-14 13:26 ` Marek Szyprowski
2020-09-14 15:09 ` Marc Zyngier
2020-09-15 6:48 ` Marek Szyprowski [this message]
2020-09-15 8:07 ` Marc Zyngier
2020-09-15 8:35 ` Marek Szyprowski
2020-09-15 9:48 ` Marc Zyngier
2020-09-16 14:16 ` Jon Hunter
2020-09-16 15:10 ` Marc Zyngier
2020-09-16 15:46 ` Jon Hunter
2020-09-16 15:55 ` Marc Zyngier
2020-09-16 15:58 ` Jon Hunter
2020-09-16 16:22 ` Marc Zyngier
2020-09-16 16:28 ` Marc Zyngier
2020-09-16 19:08 ` Jon Hunter
2020-09-16 19:06 ` Jon Hunter
2020-09-16 19:26 ` Mikko Perttunen
2020-09-16 19:39 ` Jon Hunter
2020-09-17 7:40 ` Linus Walleij
2020-09-17 7:50 ` Marc Zyngier
2020-09-17 7:54 ` Jon Hunter
2020-09-17 8:45 ` Marc Zyngier
2020-09-17 8:49 ` Jon Hunter
2020-09-17 8:54 ` Marek Szyprowski
2020-09-17 9:09 ` Jon Hunter
2020-09-17 9:13 ` Marek Szyprowski
2020-09-17 9:29 ` Marc Zyngier
2020-09-17 14:53 ` Jon Hunter
2020-09-17 18:24 ` Jon Hunter
2020-09-18 8:24 ` Marc Zyngier
2020-09-17 8:56 ` Marc Zyngier
2020-09-17 10:11 ` Linus Walleij
2020-09-16 14:03 ` Linus Walleij
2020-09-16 14:14 ` Marc Zyngier
2020-09-18 9:58 ` James Morse
2020-09-18 10:21 ` Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 09/16] irqchip/gic-common: Don't enable SGIs by default Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 10/16] irqchip/bcm2836: Configure mailbox interrupts as standard interrupts Marc Zyngier
[not found] ` <CGME20200914143236eucas1p17e8849c67d01db2c5ebb3b6a126aebf4@eucas1p1.samsung.com>
2020-09-14 14:32 ` Marek Szyprowski
2020-09-14 16:10 ` Marc Zyngier
2020-09-14 19:13 ` Marek Szyprowski
2020-09-01 14:43 ` [PATCH v3 11/16] irqchip/hip04: Configure IPIs " Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 12/16] irqchip/armada-370-xp: " Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 13/16] arm64: Kill __smp_cross_call and co Marc Zyngier
2020-09-11 15:06 ` Catalin Marinas
2020-09-01 14:43 ` [PATCH v3 14/16] arm64: Remove custom IRQ stat accounting Marc Zyngier
2020-09-11 15:06 ` Catalin Marinas
2020-09-01 14:43 ` [PATCH v3 15/16] ARM: Kill __smp_cross_call and co Marc Zyngier
2020-09-01 14:43 ` [PATCH v3 16/16] ARM: Remove custom IRQ stat accounting Marc Zyngier
2020-09-02 7:41 ` kernel test robot
2020-09-02 20:20 ` Marc Zyngier
2020-09-24 9:00 ` Guillaume Tucker
2020-09-24 9:29 ` Marc Zyngier
2020-09-24 13:09 ` Guillaume Tucker
2020-09-28 9:00 ` Guillaume Tucker
2020-09-24 13:34 ` Fabio Estevam
2020-09-24 14:19 ` Guillaume Tucker
2020-09-07 6:06 ` [PATCH v3 00/16] arm/arm64: Turning IPIs into normal interrupts hasegawa-hitomi
2020-09-16 16:54 ` Florian Fainelli
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