From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751737AbbIQMr1 (ORCPT ); Thu, 17 Sep 2015 08:47:27 -0400 Received: from gloria.sntech.de ([95.129.55.99]:50767 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751000AbbIQMr0 (ORCPT ); Thu, 17 Sep 2015 08:47:26 -0400 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Xing Zheng Cc: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linus.walleij@linaro.org, linux-gpio@vger.kernel.org Subject: Re: [PATCH v2 6/9] pinctrl: rockchip: add support for the rk3036 Date: Thu, 17 Sep 2015 14:47:14 +0200 Message-ID: <3447784.I53PqELJZg@diego> User-Agent: KMail/4.14.10 (Linux/4.1.0-2-amd64; KDE/4.14.10; x86_64; ; ) In-Reply-To: <1442486060-1770-1-git-send-email-zhengxing@rock-chips.com> References: <1442478540-15068-1-git-send-email-zhengxing@rock-chips.com> <1442486060-1770-1-git-send-email-zhengxing@rock-chips.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Donnerstag, 17. September 2015, 18:34:20 schrieb Xing Zheng: > Add new type for rk3036 and many parts of pinctrl rk3036 are similar > with rk2928's. > > Signed-off-by: Xing Zheng very nice that the rk3036 pin-controller works with already established infrastructure :-) Reviewed-by: Heiko Stuebner > --- > > Changes in v2: None > > .../bindings/pinctrl/rockchip,pinctrl.txt | 1 + > drivers/pinctrl/pinctrl-rockchip.c | 17 +++++++++++++++++ > 2 files changed, 18 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt > b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt index > 391ef4b..c73f2bb 100644 > --- a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt > +++ b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt > @@ -22,6 +22,7 @@ Required properties for iomux controller: > - compatible: one of "rockchip,rk2928-pinctrl", > "rockchip,rk3066a-pinctrl" "rockchip,rk3066b-pinctrl", > "rockchip,rk3188-pinctrl" > "rockchip,rk3288-pinctrl", "rockchip,rk3368-pinctrl" > + "rockchip,rk3036-pinctrl" > - rockchip,grf: phandle referencing a syscon providing the > "general register files" > > diff --git a/drivers/pinctrl/pinctrl-rockchip.c > b/drivers/pinctrl/pinctrl-rockchip.c index c5246c0..9c49510 100644 > --- a/drivers/pinctrl/pinctrl-rockchip.c > +++ b/drivers/pinctrl/pinctrl-rockchip.c > @@ -2089,6 +2089,21 @@ static struct rockchip_pin_ctrl rk2928_pin_ctrl = { > .pull_calc_reg = rk2928_calc_pull_reg_and_bit, > }; > > +static struct rockchip_pin_bank rk3036_pin_banks[] = { > + PIN_BANK(0, 32, "gpio0"), > + PIN_BANK(1, 32, "gpio1"), > + PIN_BANK(2, 32, "gpio2"), > +}; > + > +static struct rockchip_pin_ctrl rk3036_pin_ctrl = { > + .pin_banks = rk3036_pin_banks, > + .nr_banks = ARRAY_SIZE(rk3036_pin_banks), > + .label = "RK3036-GPIO", > + .type = RK2928, > + .grf_mux_offset = 0xa8, > + .pull_calc_reg = rk2928_calc_pull_reg_and_bit, > +}; > + > static struct rockchip_pin_bank rk3066a_pin_banks[] = { > PIN_BANK(0, 32, "gpio0"), > PIN_BANK(1, 32, "gpio1"), > @@ -2207,6 +2222,8 @@ static struct rockchip_pin_ctrl rk3368_pin_ctrl = { > static const struct of_device_id rockchip_pinctrl_dt_match[] = { > { .compatible = "rockchip,rk2928-pinctrl", > .data = (void *)&rk2928_pin_ctrl }, > + { .compatible = "rockchip,rk3036-pinctrl", > + .data = (void *)&rk3036_pin_ctrl }, > { .compatible = "rockchip,rk3066a-pinctrl", > .data = (void *)&rk3066a_pin_ctrl }, > { .compatible = "rockchip,rk3066b-pinctrl",