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k6mr4275545wrl.268.1585154374342; Wed, 25 Mar 2020 09:39:34 -0700 (PDT) Received: from ziggy.stardust ([213.195.113.243]) by smtp.gmail.com with ESMTPSA id a186sm9326877wmh.33.2020.03.25.09.39.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 25 Mar 2020 09:39:33 -0700 (PDT) Subject: Re: [PATCH v5 6/6] arm64: dts: add dts nodes for MT6779 To: Hanks Chen , Linus Walleij , Rob Herring , Mark Rutland , Sean Wang Cc: Andy Teng , linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, wsd_upstream@mediatek.com References: <1585128694-13881-1-git-send-email-hanks.chen@mediatek.com> <1585128694-13881-7-git-send-email-hanks.chen@mediatek.com> From: Matthias Brugger Autocrypt: addr=matthias.bgg@gmail.com; prefer-encrypt=mutual; keydata= mQINBFP1zgUBEAC21D6hk7//0kOmsUrE3eZ55kjc9DmFPKIz6l4NggqwQjBNRHIMh04BbCMY fL3eT7ZsYV5nur7zctmJ+vbszoOASXUpfq8M+S5hU2w7sBaVk5rpH9yW8CUWz2+ZpQXPJcFa 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NMDbxcY26CMPK204jhRm9RG687qq6691hbiuAtWABeAsl1AS+mdS7aP/4uOM4kFCvXYgIHxP /BoVz9CZTMEVAZVzbRKyYCLUf1wLhcHzugTiONz9fWMBLLskKvq7m1tlr61mNgY9nVwwClMU uE7i1H9r/2/UXLd+pY82zcXhFrfmKuCDmOkB5xPsOMVQJH8I0/lbqfLAqfsxSb/X1VKaP243 jzi+DzD9cvj2K6eD5j5kcKJJQactXqfJvF1Eb+OnxlB1BCLE8D1rNkPO5O742Mq3MgDmq19l +abzEL6QDAAxn9md8KwrA3RtucNh87cHlDXfUBKa7SRvBjTczDg+HEPNk2u3hrz1j3l2rliQ y1UfYx7Vk/TrdwUIJgKS8QAr8Lw9WuvY2hSqL9vEjx8VAkPWNWPwrQ== Message-ID: <3751b55b-07a7-7985-a8d9-5414a4ca0d24@gmail.com> Date: Wed, 25 Mar 2020 17:39:32 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 MIME-Version: 1.0 In-Reply-To: <1585128694-13881-7-git-send-email-hanks.chen@mediatek.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 25/03/2020 10:31, Hanks Chen wrote: > this adds initial MT6779 dts settings fo board support, "for board support" > including cpu, gic, timer, ccf, pinctrl, uart...etc. The etc is PMU and PSCI and sysirq, correct? Let's list at least sysirq as this is something MediaTek specific. > > Signed-off-by: Hanks Chen > --- > arch/arm64/boot/dts/mediatek/Makefile | 1 + > arch/arm64/boot/dts/mediatek/mt6779-evb.dts | 31 ++++ > arch/arm64/boot/dts/mediatek/mt6779.dtsi | 265 +++++++++++++++++++++++++++ > 3 files changed, 297 insertions(+) > create mode 100644 arch/arm64/boot/dts/mediatek/mt6779-evb.dts > create mode 100644 arch/arm64/boot/dts/mediatek/mt6779.dtsi > > diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile > index 458bbc4..53f1c61 100644 > --- a/arch/arm64/boot/dts/mediatek/Makefile > +++ b/arch/arm64/boot/dts/mediatek/Makefile > @@ -1,6 +1,7 @@ > # SPDX-License-Identifier: GPL-2.0 > dtb-$(CONFIG_ARCH_MEDIATEK) += mt2712-evb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-evb.dtb > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt6779-evb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb > diff --git a/arch/arm64/boot/dts/mediatek/mt6779-evb.dts b/arch/arm64/boot/dts/mediatek/mt6779-evb.dts > new file mode 100644 > index 0000000..164f5cb > --- /dev/null > +++ b/arch/arm64/boot/dts/mediatek/mt6779-evb.dts > @@ -0,0 +1,31 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright (c) 2019 MediaTek Inc. > + * Author: Mars.C > + * > + */ > + > +/dts-v1/; > +#include "mt6779.dtsi" > + > +/ { > + model = "MediaTek MT6779 EVB"; > + compatible = "mediatek,mt6779-evb", "mediatek,mt6779"; > + > + aliases { > + serial0 = &uart0; > + }; > + > + memory@40000000 { > + device_type = "memory"; > + reg = <0 0x40000000 0 0x1e800000>; > + }; > + > + chosen { > + stdout-path = "serial0:921600n8"; > + }; > +}; > + > +&uart0 { > + status = "okay"; > +}; > diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi b/arch/arm64/boot/dts/mediatek/mt6779.dtsi > new file mode 100644 > index 0000000..422ff5f > --- /dev/null > +++ b/arch/arm64/boot/dts/mediatek/mt6779.dtsi > @@ -0,0 +1,265 @@ [...] > + > + uart_clk: dummy26m { > + compatible = "fixed-clock"; > + clock-frequency = <26000000>; > + #clock-cells = <0>; > + }; No real clocks for uart? What about CLK_INFRA_UARTx? > + > + timer { > + compatible = "arm,armv8-timer"; > + interrupt-parent = <&gic>; > + interrupts = , > + , > + , > + ; > + }; > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + compatible = "simple-bus"; > + ranges; > + [...] > + > + uart0: serial@11002000 { > + compatible = "mediatek,mt6779-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11002000 0 0x400>; > + interrupts = ; > + clocks = <&uart_clk>; > + status = "disabled"; > + }; > + > + uart1: serial@11003000 { > + compatible = "mediatek,mt6779-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11003000 0 0x400>; > + interrupts = ; > + clocks = <&uart_clk>; > + status = "disabled"; > + }; SoC has only two UARTs but clock driver has three, how comes? > + > + audio: clock-controller@11210000 { > + compatible = "mediatek,mt6779-audio", "syscon"; > + reg = <0 0x11210000 0 0x1000>; > + #clock-cells = <1>; > + }; > + > + mfgcfg: clock-controller@13fbf000 { > + compatible = "mediatek,mt6779-mfgcfg", "syscon"; > + reg = <0 0x13fbf000 0 0x1000>; > + #clock-cells = <1>; > + }; > + > + mmsys: clock-controller@14000000 { > + compatible = "mediatek,mt6779-mmsys", "syscon"; > + reg = <0 0x14000000 0 0x1000>; > + #clock-cells = <1>; > + }; Please beware that we are refactoring the mmsys right now. Please use this new approach as this will go upstream soon. https://patchwork.kernel.org/project/linux-mediatek/list/?series=254897 Regards, Matthias