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([2001:b07:6468:f312:f4b0:55d4:57da:3527]) by smtp.gmail.com with ESMTPSA id w9sm3231973wrt.62.2019.10.09.02.21.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 09 Oct 2019 02:21:46 -0700 (PDT) Subject: Re: [PATCH v3 15/16] kvm: x86: ioapic: Lazy update IOAPIC EOI To: "Suthikulpanit, Suravee" , "linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" Cc: "rkrcmar@redhat.com" , "joro@8bytes.org" , "vkuznets@redhat.com" , "graf@amazon.com" , "jschoenh@amazon.de" , "karahmed@amazon.de" , "rimasluk@amazon.com" , "Grimm, Jon" References: <1568401242-260374-1-git-send-email-suravee.suthikulpanit@amd.com> <1568401242-260374-16-git-send-email-suravee.suthikulpanit@amd.com> From: Paolo Bonzini Openpgp: preference=signencrypt Message-ID: <3771e33d-365b-c214-3d40-bca67c2fa841@redhat.com> Date: Wed, 9 Oct 2019 11:21:41 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <1568401242-260374-16-git-send-email-suravee.suthikulpanit@amd.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 13/09/19 21:01, Suthikulpanit, Suravee wrote: > /* > + * In case APICv accelerate EOI write and do not trap, > + * in-kernel IOAPIC will not be able to receive the EOI. > + * In this case, we do lazy update of the pending EOI when > + * trying to set IOAPIC irq. > + */ > + if (kvm_apicv_eoi_accelerate(ioapic->kvm, edge)) > + ioapic_lazy_update_eoi(ioapic, irq); > + This is okay for the RTC, and in fact I suggest that you make it work like this even for Intel. This will get rid of kvm_apicv_eoi_accelerate and be nicer overall. However, it cannot work for the in-kernel PIT, because it is currently checking ps->irq_ack before kvm_set_irq. Unfortunately, the in-kernel PIT is relying on the ack notifier to timely queue the pt->worker work item and reinject the missed tick. Thus, you cannot enable APICv if ps->reinject is true. Perhaps you can make kvm->arch.apicv_state a disabled counter? Then Hyper-V can increment it when enabled, PIT can increment it when ps->reinject becomes true and decrement it when it becomes false; finally, svm.c can increment it when an SVM guest is launched and increment/decrement it around ExtINT handling? (This conflicts with some of the suggestions I made earlier, which implied the existence of apicv_state, but everything should if anything become easier). Paolo