From: "Luck, Tony" <tony.luck@intel.com>
To: Borislav Petkov <bp@alien8.de>,
"Kirill A. Shutemov" <kirill@shutemov.name>
Cc: Alexey Dobriyan <adobriyan@gmail.com>,
"kirill.shutemov@linux.intel.com"
<kirill.shutemov@linux.intel.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"Lin, Jing" <jing.lin@intel.com>,
"x86@kernel.org" <x86@kernel.org>
Subject: RE: [PATCH] x86/asm: Add support for MOVDIR64B instruction
Date: Thu, 1 Aug 2019 22:06:27 +0000 [thread overview]
Message-ID: <3908561D78D1C84285E8C5FCA982C28F7EA0719C@ORSMSX104.amr.corp.intel.com> (raw)
In-Reply-To: <20190801203614.GA16228@zn.tnic>
> I think Tony's in the right direction. We already do dst "sizing" like
> that for the compiler in clwb().
The clwb case does look like what we want for movdir64b().
But is it right for clwb() ... that doesn't modify anything, just pushes
things from cache to memory. So why is it using "+m"?
-Tony
next prev parent reply other threads:[~2019-08-01 22:06 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-01 19:43 [PATCH] x86/asm: Add support for MOVDIR64B instruction Alexey Dobriyan
2019-08-01 19:49 ` Luck, Tony
2019-08-01 20:28 ` Kirill A. Shutemov
2019-08-01 20:36 ` Borislav Petkov
2019-08-01 22:06 ` Luck, Tony [this message]
2019-08-02 14:40 ` Borislav Petkov
2019-08-05 17:50 ` Lin, Jing
2019-08-01 21:53 ` Alexey Dobriyan
2019-08-02 8:15 ` Peter Zijlstra
2019-08-02 12:58 ` Kirill A. Shutemov
-- strict thread matches above, loose matches on Subject: below --
2019-07-30 23:05 Kirill A. Shutemov
2019-07-31 0:24 ` jinglin
2019-08-01 10:03 ` Borislav Petkov
2019-08-01 11:03 ` Kirill A. Shutemov
2019-08-01 19:20 ` Luck, Tony
2019-08-01 19:36 ` Borislav Petkov
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