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From: Konrad Dybcio <konrad.dybcio@somainline.org>
To: Stephen Boyd <sboyd@kernel.org>, phone-devel@vger.kernel.org
Cc: ~postmarketos/upstreaming@lists.sr.ht,
	martin.botka@somainline.org,
	angelogioacchino.delregno@somainline.org,
	marijn.suijten@somainline.org, Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>,
	Taniya Das <tdas@codeaurora.org>,
	Craig Tatlor <ctatlor97@gmail.com>,
	linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 5/6] clk: qcom: gcc-sdm660: Account for needed adjustments in probe function
Date: Thu, 25 Feb 2021 20:09:14 +0100	[thread overview]
Message-ID: <3917fba4-e5b0-911f-9220-f401a90aac38@somainline.org> (raw)
In-Reply-To: <161404077336.1254594.15002572465360321874@swboyd.mtv.corp.google.com>

Hi and sorry for the late reply,


>> +
>> +       /* Keep bimc gfx clock port on all the time */
>> +       clk_prepare_enable(gcc_bimc_gfx_clk.clkr.hw.clk);
>> +
> Preferably just set these various bits with regmap_update_bits() during
> probe. Also, please do it before regsitering the clks, not after.

To be fair, now I think that simply adding CLK_IS_CRITICAL flag to the clocks in question is the smartest thing to do. Magic writes don't tell a whole lot.


>> +       /* Set the HMSS_GPLL0_SRC for 300MHz to CPU subsystem */
>> +       clk_set_rate(hmss_gpll0_clk_src.clkr.hw.clk, 300000000);
> Is this not already the case?


This is a mission-critical clock and we cannot trust the bootloader with setting it. Otherwise dragons might appear.


Konrad



  reply	other threads:[~2021-02-25 19:15 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-20 15:56 [PATCH 1/6] clk: qcom: gcc-sdm660: Fix hmss_gpll0_clk_src parent_map Konrad Dybcio
2021-02-20 15:56 ` [PATCH 2/6] clk: qcom: gcc-sdm660: Set HWCG bit to 1 on some clocks Konrad Dybcio
2021-02-20 15:56 ` [PATCH 3/6] clk: qcom: gcc-sdm660: Add missing clocks and GDSCs Konrad Dybcio
2021-02-20 15:56 ` [PATCH 4/6] clk: qcom: gcc-sdm660: Remove gds_hw_ctrl from GDSCs Konrad Dybcio
2021-02-20 15:56 ` [PATCH 5/6] clk: qcom: gcc-sdm660: Account for needed adjustments in probe function Konrad Dybcio
2021-02-23  0:39   ` Stephen Boyd
2021-02-25 19:09     ` Konrad Dybcio [this message]
2021-04-01  1:53       ` Stephen Boyd
2021-04-01 21:10         ` Konrad Dybcio
2021-05-26 19:11           ` Konrad Dybcio
2021-05-26 22:32             ` Stephen Boyd
2021-02-20 15:56 ` [PATCH 6/6] clk: qcom: gcc-sdm660: Add CLK_SET_RATE_PARENT where applicable Konrad Dybcio
2021-02-23  0:42   ` Stephen Boyd
2021-02-25 19:27     ` Konrad Dybcio

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