Linus, please do a bk pull bk://kernel.bkbits.net/jgarzik/misc-2.5 This will update the following files: arch/i386/pci/common.c | 10 +++++++++ drivers/char/hw_random.c | 3 +- drivers/pci/pci.c | 48 +++++++++++++++++++++++------------------------ 3 files changed, 36 insertions(+), 25 deletions(-) through these ChangeSets: (03/03/22 1.1202) [hw_random] fix amd x86-64 RNG pci id Contributed by Andi Kleen (03/03/22 1.1201) [PATCH] PCI MWI cacheline size fix This is rather conservative variant of previous patch: - no changes required for drivers or architectures with HAVE_ARCH_PCI_MWI; - do respect BIOS settings: if the cacheline size is multiple of that we have expected, assume that this is on purpose; - assume cacheline size of 32 bytes for all x86s except K7/K8 and P4. Actually it's good for 386/486s as quite a few PCI devices do not support smaller values. If you all are fine with it, I can make a 2.4 counterpart. As for more aggressive changes: I'd prefer to wait until pending stuff from rmk and myself gets in and the whole thing stabilizes. Then we can start fine tuning of MWI, FBB, latency timers and so on. Ivan. (03/03/20 1.1101.23.1) [hw_random] add AMD x86-64 pci id Contributed by Andi Kleen