From: Tiezhu Yang <yangtiezhu@loongson.cn>
To: kbuild test robot <lkp@intel.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: kbuild-all@lists.01.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, Xuefeng Li <lixuefeng@loongson.cn>
Subject: Re: [PATCH v4 2/2] clk: Allow COMPILE_TEST for subdir hisilicon in Makefile
Date: Tue, 2 Jun 2020 09:43:29 +0800 [thread overview]
Message-ID: <3b371f54-3ee3-0248-b9d7-1b766449dffc@loongson.cn> (raw)
In-Reply-To: <202006010557.pUApller%lkp@intel.com>
On 06/01/2020 05:05 AM, kbuild test robot wrote:
> Hi Tiezhu,
>
> Thank you for the patch! Yet something to improve:
>
> [auto build test ERROR on clk/clk-next]
> [also build test ERROR on v5.7-rc7 next-20200529]
> [if your patch is applied to the wrong git tree, please drop us a note to help
> improve the system. BTW, we also suggest to use '--base' option to specify the
> base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
>
> url: https://github.com/0day-ci/linux/commits/Tiezhu-Yang/clk-hisilicon-Use-correct-return-value-about-hisi_reset_init/20200527-233606
> base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
> config: openrisc-randconfig-r021-20200531 (attached as .config)
> compiler: or1k-linux-gcc (GCC) 9.3.0
> reproduce (this is a W=1 build):
> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # save the attached .config to linux build tree
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=openrisc
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kbuild test robot <lkp@intel.com>
Hi,
Thanks for your report, please ignore this patch.
>
> All errors (new ones prefixed by >>, old ones prefixed by <<):
>
> or1k-linux-ld: drivers/clk/hisilicon/clk.o: in function `hisi_clk_register_fixed_rate':
>>> clk.c:(.text+0x158): undefined reference to `clk_register_fixed_rate'
> clk.c:(.text+0x158): relocation truncated to fit: R_OR1K_INSN_REL_26 against undefined symbol `clk_register_fixed_rate'
> or1k-linux-ld: clk.c:(.text+0x220): undefined reference to `clk_unregister_fixed_rate'
> clk.c:(.text+0x220): relocation truncated to fit: R_OR1K_INSN_REL_26 against undefined symbol `clk_unregister_fixed_rate'
> or1k-linux-ld: drivers/clk/hisilicon/clk.o: in function `hisi_clk_register_fixed_factor':
>>> clk.c:(.text+0x2a0): undefined reference to `clk_register_fixed_factor'
> clk.c:(.text+0x2a0): relocation truncated to fit: R_OR1K_INSN_REL_26 against undefined symbol `clk_register_fixed_factor'
> or1k-linux-ld: clk.c:(.text+0x370): undefined reference to `clk_unregister_fixed_factor'
> clk.c:(.text+0x370): relocation truncated to fit: R_OR1K_INSN_REL_26 against undefined symbol `clk_unregister_fixed_factor'
> or1k-linux-ld: drivers/clk/hisilicon/clk.o: in function `hisi_clk_register_mux':
>>> clk.c:(.text+0x434): undefined reference to `clk_register_mux_table'
> clk.c:(.text+0x434): relocation truncated to fit: R_OR1K_INSN_REL_26 against undefined symbol `clk_register_mux_table'
> or1k-linux-ld: clk.c:(.text+0x464): undefined reference to `clk_register_clkdev'
> clk.c:(.text+0x464): relocation truncated to fit: R_OR1K_INSN_REL_26 against undefined symbol `clk_register_clkdev'
> or1k-linux-ld: clk.c:(.text+0x528): undefined reference to `clk_unregister_mux'
> clk.c:(.text+0x528): relocation truncated to fit: R_OR1K_INSN_REL_26 against undefined symbol `clk_unregister_mux'
> or1k-linux-ld: drivers/clk/hisilicon/clk.o: in function `hisi_clk_register_divider':
>>> clk.c:(.text+0x6e8): undefined reference to `clk_register_divider_table'
> clk.c:(.text+0x6e8): relocation truncated to fit: R_OR1K_INSN_REL_26 against undefined symbol `clk_register_divider_table'
> or1k-linux-ld: clk.c:(.text+0x718): undefined reference to `clk_register_clkdev'
> clk.c:(.text+0x718): relocation truncated to fit: R_OR1K_INSN_REL_26 against undefined symbol `clk_register_clkdev'
> or1k-linux-ld: clk.c:(.text+0x7d0): undefined reference to `clk_unregister_divider'
> clk.c:(.text+0x7d0): relocation truncated to fit: R_OR1K_INSN_REL_26 against undefined symbol `clk_unregister_divider'
> or1k-linux-ld: drivers/clk/hisilicon/clk.o: in function `hisi_clk_register_gate':
>>> clk.c:(.text+0x870): undefined reference to `clk_register_gate'
> clk.c:(.text+0x870): additional relocation overflows omitted from the output
> or1k-linux-ld: clk.c:(.text+0x8a0): undefined reference to `clk_register_clkdev'
> or1k-linux-ld: clk.c:(.text+0x960): undefined reference to `clk_unregister_gate'
> or1k-linux-ld: drivers/clk/hisilicon/clk.o: in function `hisi_clk_register_gate_sep':
>>> clk.c:(.text+0xa4c): undefined reference to `clk_register_clkdev'
> or1k-linux-ld: drivers/clk/hisilicon/clk.o: in function `hisi_clk_init':
> clk.c:(.text+0xb5c): undefined reference to `of_clk_src_onecell_get'
> or1k-linux-ld: clk.c:(.text+0xb6c): undefined reference to `of_clk_src_onecell_get'
> or1k-linux-ld: clk.c:(.text+0xb70): undefined reference to `of_clk_add_provider'
> or1k-linux-ld: drivers/clk/hisilicon/clk.o: in function `hi6220_clk_register_divider':
>>> clk.c:(.init.text+0xe0): undefined reference to `clk_register_clkdev'
> or1k-linux-ld: drivers/clk/hisilicon/clkgate-separated.o: in function `hisi_register_clkgate_sep':
>>> clkgate-separated.c:(.text+0x2b4): undefined reference to `clk_register'
> or1k-linux-ld: drivers/clk/hisilicon/clkdivider-hi6220.o: in function `hi6220_clkdiv_set_rate':
>>> clkdivider-hi6220.c:(.text+0x30): undefined reference to `divider_get_val'
> or1k-linux-ld: drivers/clk/hisilicon/clkdivider-hi6220.o: in function `hi6220_clkdiv_round_rate':
>>> clkdivider-hi6220.c:(.text+0x15c): undefined reference to `clk_hw_get_parent'
> or1k-linux-ld: clkdivider-hi6220.c:(.text+0x180): undefined reference to `divider_round_rate_parent'
> or1k-linux-ld: drivers/clk/hisilicon/clkdivider-hi6220.o: in function `hi6220_clkdiv_recalc_rate':
>>> clkdivider-hi6220.c:(.text+0x214): undefined reference to `divider_recalc_rate'
> or1k-linux-ld: drivers/clk/hisilicon/clkdivider-hi6220.o: in function `hi6220_register_clkdiv':
>>> clkdivider-hi6220.c:(.text+0x380): undefined reference to `clk_register'
> or1k-linux-ld: drivers/clk/hisilicon/clk-hisi-phase.o: in function `clk_register_hisi_phase':
>>> clk-hisi-phase.c:(.text+0x2f0): undefined reference to `devm_clk_register'
> ---
> 0-DAY CI Kernel Test Service, Intel Corporation
> https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
next prev parent reply other threads:[~2020-06-02 1:43 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-27 14:39 [PATCH v4 1/2] clk: hisilicon: Use correct return value about hisi_reset_init() Tiezhu Yang
2020-05-27 14:39 ` [PATCH v4 2/2] clk: Allow COMPILE_TEST for subdir hisilicon in Makefile Tiezhu Yang
2020-05-31 21:05 ` kbuild test robot
2020-06-02 1:43 ` Tiezhu Yang [this message]
2020-05-27 19:06 ` [PATCH v4 1/2] clk: hisilicon: Use correct return value about hisi_reset_init() Stephen Boyd
2020-05-28 2:27 ` Tiezhu Yang
2020-05-28 23:15 ` Stephen Boyd
2020-05-29 2:03 ` Tiezhu Yang
2020-05-29 3:58 ` Stephen Boyd
2020-05-29 4:02 ` Tiezhu Yang
2020-05-29 4:31 ` Stephen Boyd
2020-05-29 6:44 ` Tiezhu Yang
2020-05-29 9:36 ` Stephen Boyd
2020-05-29 10:20 ` Tiezhu Yang
2020-05-29 21:14 ` Stephen Boyd
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