Re: [PATCH] perf/x86/intel: Add counter freezing quirk for Goldmont

From: "Liang, Kan" <kan.liang@linux.intel.com>
To: linux-kernel-owner@vger.kernel.org, Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>,
	mingo@redhat.com, acme@kernel.org,
	LKML <linux-kernel@vger.kernel.org>,
	eranian@google.com, ak@linux.intel.com,
	alexander.shishkin@linux.intel.com, x86@kernel.org
Subject: Re: [PATCH] perf/x86/intel: Add counter freezing quirk for Goldmont
Date: Wed, 3 Oct 2018 10:25:03 -0400	[thread overview]
Message-ID: <3d5a49d4-85c8-0d7f-254e-d9d02419e718@linux.intel.com> (raw)
In-Reply-To: <a72002d5-be3a-1f51-dc26-ac4e962586d2@linux.intel.com>

On 10/3/2018 10:15 AM, linux-kernel-owner@vger.kernel.org wrote:
> To make it more generic, I think we also need to extend the struct 
> sku_microcode to check vendor and family.
> The "model" in struct x86_cpu_id is u16. I will also change "model" and 
> "stepping" to u16.
> 
> struct sku_microcode {
>      u16 vendor;
>      u16 family;
>      u16 model;
>      u16 stepping;
>      u32 microcode;
> };

No, should be consistent as struct cpuinfo_x86.
The struct sku_microcode should be

struct sku_microcode {
       u8 vendor;
       u8 family;
       u8 model;
       u8 stepping;
       u32 microcode;
};

Thanks,
Kan