linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Philipp Zabel <p.zabel@pengutronix.de>
To: Hal Feng <hal.feng@starfivetech.com>,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org
Cc: Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Ben Dooks <ben.dooks@sifive.com>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 06/21] reset: Create subdirectory for StarFive drivers
Date: Tue, 14 Mar 2023 15:34:26 +0100	[thread overview]
Message-ID: <3df9aa881dce1cfb1360c4d4fe6f609f5a73f97b.camel@pengutronix.de> (raw)
In-Reply-To: <20230311090733.56918-7-hal.feng@starfivetech.com>

On Sa, 2023-03-11 at 17:07 +0800, Hal Feng wrote:
> From: Emil Renner Berthing <kernel@esmil.dk>
> 
> This moves the StarFive JH7100 reset driver to a new subdirectory in
> preparation for adding more StarFive reset drivers.
> 
> Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> ---
>  MAINTAINERS                                          | 2 +-
>  drivers/reset/Kconfig                                | 8 +-------
>  drivers/reset/Makefile                               | 2 +-
>  drivers/reset/starfive/Kconfig                       | 8 ++++++++
>  drivers/reset/starfive/Makefile                      | 2 ++
>  drivers/reset/{ => starfive}/reset-starfive-jh7100.c | 0
>  6 files changed, 13 insertions(+), 9 deletions(-)
>  create mode 100644 drivers/reset/starfive/Kconfig
>  create mode 100644 drivers/reset/starfive/Makefile
>  rename drivers/reset/{ => starfive}/reset-starfive-jh7100.c (100%)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index caba3b61ad5c..87f210e357ca 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19940,7 +19940,7 @@ STARFIVE JH7100 RESET CONTROLLER DRIVER
>  M:	Emil Renner Berthing <kernel@esmil.dk>
>  S:	Maintained
>  F:	Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml
> -F:	drivers/reset/reset-starfive-jh7100.c
> +F:	drivers/reset/starfive/reset-starfive-jh7100.c
>  F:	include/dt-bindings/reset/starfive-jh7100.h
>  
> 
> 
> 
>  STARFIVE JH71XX PMU CONTROLLER DRIVER
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index 6ae5aa46a6b2..6aa8f243b30c 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -232,13 +232,6 @@ config RESET_SOCFPGA
>  	  This enables the reset driver for the SoCFPGA ARMv7 platforms. This
>  	  driver gets initialized early during platform init calls.
>  
> 
> 
> 
> -config RESET_STARFIVE_JH7100
> -	bool "StarFive JH7100 Reset Driver"
> -	depends on ARCH_STARFIVE || COMPILE_TEST
> -	default ARCH_STARFIVE
> -	help
> -	  This enables the reset controller driver for the StarFive JH7100 SoC.
> -
>  config RESET_SUNPLUS
>  	bool "Sunplus SoCs Reset Driver" if COMPILE_TEST
>  	default ARCH_SUNPLUS
> @@ -320,6 +313,7 @@ config RESET_ZYNQ
>  	help
>  	  This enables the reset controller driver for Xilinx Zynq SoCs.
>  
> 
> 
> 
> +source "drivers/reset/starfive/Kconfig"
>  source "drivers/reset/sti/Kconfig"
>  source "drivers/reset/hisilicon/Kconfig"
>  source "drivers/reset/tegra/Kconfig"
> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> index 3e7e5fd633a8..719b8f6f84bc 100644
> --- a/drivers/reset/Makefile
> +++ b/drivers/reset/Makefile
> @@ -1,6 +1,7 @@
>  # SPDX-License-Identifier: GPL-2.0
>  obj-y += core.o
>  obj-y += hisilicon/
> +obj-$(CONFIG_ARCH_STARFIVE) += starfive/

This should really be obj-y, otherwise this won't compile with
COMPILE_TEST=y but ARCH_STARFIVE=n.

With that fixed,
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>

regards
Philipp

  reply	other threads:[~2023-03-14 14:35 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-11  9:07 [PATCH v5 00/21] Basic clock, reset & device tree support for StarFive JH7110 RISC-V SoC Hal Feng
2023-03-11  9:07 ` [PATCH v5 01/21] clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE Hal Feng
2023-03-11 12:56   ` Conor Dooley
2023-03-11  9:07 ` [PATCH v5 02/21] clk: starfive: Factor out common JH7100 and JH7110 code Hal Feng
2023-03-11  9:07 ` [PATCH v5 03/21] clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h Hal Feng
2023-03-12 14:00   ` Conor Dooley
2023-03-13  2:37     ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 04/21] clk: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng
2023-03-16 19:05   ` Tommaso Merciai
2023-03-18  4:19     ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 05/21] reset: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE Hal Feng
2023-03-11 12:56   ` Conor Dooley
2023-03-14 14:34   ` Philipp Zabel
2023-03-20 11:51   ` Emil Renner Berthing
2023-03-11  9:07 ` [PATCH v5 06/21] reset: Create subdirectory for StarFive drivers Hal Feng
2023-03-14 14:34   ` Philipp Zabel [this message]
2023-03-17  8:17     ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 07/21] reset: starfive: Factor out common JH71X0 reset code Hal Feng
2023-03-11  9:07 ` [PATCH v5 08/21] reset: starfive: Extract the " Hal Feng
2023-03-11  9:07 ` [PATCH v5 09/21] reset: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng
2023-03-11  9:07 ` [PATCH v5 10/21] reset: starfive: jh71x0: Use 32bit I/O on 32bit registers Hal Feng
2023-03-11  9:07 ` [PATCH v5 11/21] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator Hal Feng
2023-03-11 13:11   ` Conor Dooley
2023-03-13  3:22     ` Hal Feng
2023-03-13  8:53       ` Emil Renner Berthing
2023-03-14 14:09         ` Hal Feng
2023-03-11 14:17   ` Rob Herring
2023-03-13  2:47     ` Hal Feng
2023-03-13  7:51       ` Krzysztof Kozlowski
2023-03-14 14:18         ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 12/21] dt-bindings: clock: Add StarFive JH7110 always-on " Hal Feng
2023-03-11 13:14   ` Conor Dooley
2023-03-19 13:28     ` Hal Feng
2023-03-11 14:18   ` Rob Herring
2023-03-13  2:49     ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 13/21] clk: starfive: Add StarFive JH7110 system clock driver Hal Feng
2023-03-11  9:07 ` [PATCH v5 14/21] clk: starfive: Add StarFive JH7110 always-on " Hal Feng
2023-03-11  9:07 ` [PATCH v5 15/21] reset: starfive: Add StarFive JH7110 reset driver Hal Feng
2023-03-11  9:07 ` [PATCH v5 16/21] dt-bindings: timer: Add StarFive JH7110 clint Hal Feng
2023-03-11  9:07 ` [PATCH v5 17/21] dt-bindings: interrupt-controller: Add StarFive JH7110 plic Hal Feng
2023-03-11  9:07 ` [PATCH v5 18/21] dt-bindings: riscv: Add SiFive S7 compatible Hal Feng
2023-03-11  9:07 ` [PATCH v5 19/21] riscv: dts: starfive: Add initial StarFive JH7110 device tree Hal Feng
2023-03-11  9:07 ` [PATCH v5 20/21] riscv: dts: starfive: Add StarFive JH7110 pin function definitions Hal Feng
2023-03-11  9:07 ` [PATCH v5 21/21] riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree Hal Feng

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=3df9aa881dce1cfb1360c4d4fe6f609f5a73f97b.camel@pengutronix.de \
    --to=p.zabel@pengutronix.de \
    --cc=aou@eecs.berkeley.edu \
    --cc=ben.dooks@sifive.com \
    --cc=conor@kernel.org \
    --cc=daniel.lezcano@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=emil.renner.berthing@canonical.com \
    --cc=hal.feng@starfivetech.com \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=maz@kernel.org \
    --cc=mturquette@baylibre.com \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=robh+dt@kernel.org \
    --cc=sboyd@kernel.org \
    --cc=tglx@linutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).