* [PATCH v2 00/11] dts: Update coresight device tree bindings
@ 2018-09-12 13:53 Suzuki K Poulose
2018-09-12 13:53 ` [PATCH v2 01/11] coresight: dts: binding: Fix example for TPIU component Suzuki K Poulose
` (11 more replies)
0 siblings, 12 replies; 29+ messages in thread
From: Suzuki K Poulose @ 2018-09-12 13:53 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mathieu.poirier, linux-kernel, devicetree, robh, frowand.list,
coresight, leo.yan, suzuki.poulose, Alexandre Belloni,
Andy Gross, Benoît Cousson, David Brown, Fabio Estevam,
Ivan T . Ivanov, Linus Walleij, linux-omap, lipengcheng8,
Liviu Dudau, Lorenzo Pieralisi, Nicolas Ferre, orsonzhai,
Pengutronix Kernel Team, Sascha Hauer, Shawn Guo, Sudeep Holla,
Tony Lindgren, Wei Xu, zhang.lyra, arm
Coresight DT bindings have been updated to obey the DTS rules
for label/address matching for graph nodes. The changes are in
coresight/next tree scheduled for v4.20. This series updates the
in kernel dts to match the new bindings along with updating a couple
of new examples (e.,g CATU) in the Documentation (which were missed
as they were still in flight when we created the series).
Please note that this should not be pulled for v4.19, which I think
is a safe assumption. But please do pull it for v4.20.
The dt updates for the Juno boards were sent earlier with the original
DT update series and has been queued for v4.20.
Applies on coresight/next (which is based on v4.19) and should apply
cleanly on v4.19-rc3.
Changes since V1:
- Avoid "avoid_unnecessary_addr_size" warnings by removing
#address-cells/#size-cells for single port with address 0.
- Fix TPIU inport for qcom msm8196. (Leo Yan)
- Fix documentation example for TPIU (Leo Yan)
- Fix subject tags (as pointed out by Leo and Shawn)
- Drop patch for TC2, which has been queued by Sudeep
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Andy Gross <andy.gross@linaro.org>
Cc: Benoît Cousson <bcousson@baylibre.com>
Cc: David Brown <david.brown@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-omap@vger.kernel.org
Cc: lipengcheng8@huawei.com
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: orsonzhai@gmail.com
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: xuwei5@hisilicon.com
Cc: zhang.lyra@gmail.com
Cc: arm@kernel.org
Suzuki K Poulose (11):
coresight: dts: binding: Fix example for TPIU component
coresight: dts: binding: Update coresight binding examples
arm64: dts: hi6220: Update coresight bindings for hardware ports
arm64: dts: sc9836/sc9860: Update coresight bindings for hardware
ports
arm64: dts: msm8916: Update coresight bindings for hardware ports
arm: dts: hip04: Update coresight bindings for hardware ports
arm: dts: imx7: Update coresight binding for hardware ports
arm: dts: omap: Update coresight bindings for hardware ports
arm: dts: qcom: Update coresight bindings for hardware ports
arm: dts: sama5d2: Update coresight bindings for hardware ports
arm: dts: ste-dbx5x0: Update coresight bindings for hardware port
.../devicetree/bindings/arm/coresight.txt | 27 +-
arch/arm/boot/dts/hip04.dtsi | 346 +++++++++---------
arch/arm/boot/dts/imx7d.dtsi | 14 +-
arch/arm/boot/dts/imx7s.dtsi | 82 ++---
arch/arm/boot/dts/omap3-beagle-xm.dts | 17 +-
arch/arm/boot/dts/omap3-beagle.dts | 17 +-
arch/arm/boot/dts/qcom-apq8064.dtsi | 71 ++--
arch/arm/boot/dts/qcom-msm8974.dtsi | 104 +++---
arch/arm/boot/dts/sama5d2.dtsi | 17 +-
arch/arm/boot/dts/ste-dbx5x0.dtsi | 65 ++--
.../boot/dts/hisilicon/hi6220-coresight.dtsi | 181 +++++----
arch/arm64/boot/dts/qcom/msm8916.dtsi | 95 ++---
arch/arm64/boot/dts/sprd/sc9836.dtsi | 82 +++--
arch/arm64/boot/dts/sprd/sc9860.dtsi | 215 +++++------
14 files changed, 682 insertions(+), 651 deletions(-)
--
2.19.0
^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH v2 01/11] coresight: dts: binding: Fix example for TPIU component
2018-09-12 13:53 [PATCH v2 00/11] dts: Update coresight device tree bindings Suzuki K Poulose
@ 2018-09-12 13:53 ` Suzuki K Poulose
2018-09-26 20:30 ` Rob Herring
2018-09-12 13:53 ` [PATCH v2 02/11] coresight: dts: binding: Update coresight binding examples Suzuki K Poulose
` (10 subsequent siblings)
11 siblings, 1 reply; 29+ messages in thread
From: Suzuki K Poulose @ 2018-09-12 13:53 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mathieu.poirier, linux-kernel, devicetree, robh, frowand.list,
coresight, leo.yan, suzuki.poulose
TPIU component has an input port. The example uses out-ports
which is wrong. Let us fix it.
Reported-by: Leo Yan <leo.yan@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
Documentation/devicetree/bindings/arm/coresight.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
index f39d2c6eb49c..13b6198ce01c 100644
--- a/Documentation/devicetree/bindings/arm/coresight.txt
+++ b/Documentation/devicetree/bindings/arm/coresight.txt
@@ -132,7 +132,7 @@ Example:
clocks = <&oscclk6a>;
clock-names = "apb_pclk";
- out-ports {
+ in-ports {
port {
tpiu_in_port: endpoint@0 {
remote-endpoint = <&replicator_out_port1>;
--
2.19.0
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v2 02/11] coresight: dts: binding: Update coresight binding examples
2018-09-12 13:53 [PATCH v2 00/11] dts: Update coresight device tree bindings Suzuki K Poulose
2018-09-12 13:53 ` [PATCH v2 01/11] coresight: dts: binding: Fix example for TPIU component Suzuki K Poulose
@ 2018-09-12 13:53 ` Suzuki K Poulose
2018-09-12 13:53 ` [PATCH v2 03/11] arm64: dts: hi6220: Update coresight bindings for hardware ports Suzuki K Poulose
` (9 subsequent siblings)
11 siblings, 0 replies; 29+ messages in thread
From: Suzuki K Poulose @ 2018-09-12 13:53 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mathieu.poirier, linux-kernel, devicetree, robh, frowand.list,
coresight, leo.yan, suzuki.poulose
While we updated the coresight DT bindings, some of the
new examples were not updated due to the order in which they
were merged. Let us update all the missed out ones to the
new bindings to avoid confusion.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Frank Rowand <frowand.list@gmail.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
.../devicetree/bindings/arm/coresight.txt | 25 ++++++++-----------
1 file changed, 10 insertions(+), 15 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
index 13b6198ce01c..f8aff65ab921 100644
--- a/Documentation/devicetree/bindings/arm/coresight.txt
+++ b/Documentation/devicetree/bindings/arm/coresight.txt
@@ -147,22 +147,16 @@ Example:
clocks = <&oscclk6a>;
clock-names = "apb_pclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* input port */
- port@0 {
- reg = <0>;
+ in-ports {
+ port {
etr_in_port: endpoint {
- slave-mode;
remote-endpoint = <&replicator2_out_port0>;
};
};
+ };
- /* CATU link represented by output port */
- port@1 {
- reg = <1>;
+ out-ports {
+ port {
etr_out_port: endpoint {
remote-endpoint = <&catu_in_port>;
};
@@ -310,10 +304,11 @@ Example:
clock-names = "apb_pclk";
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- port {
- catu_in_port: endpoint {
- slave-mode;
- remote-endpoint = <&etr_out_port>;
+ in-ports {
+ port {
+ catu_in_port: endpoint {
+ remote-endpoint = <&etr_out_port>;
+ };
};
};
};
--
2.19.0
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v2 03/11] arm64: dts: hi6220: Update coresight bindings for hardware ports
2018-09-12 13:53 [PATCH v2 00/11] dts: Update coresight device tree bindings Suzuki K Poulose
2018-09-12 13:53 ` [PATCH v2 01/11] coresight: dts: binding: Fix example for TPIU component Suzuki K Poulose
2018-09-12 13:53 ` [PATCH v2 02/11] coresight: dts: binding: Update coresight binding examples Suzuki K Poulose
@ 2018-09-12 13:53 ` Suzuki K Poulose
2018-09-21 14:06 ` Wei Xu
2018-09-12 13:53 ` [PATCH v2 04/11] arm64: dts: sc9836/sc9860: " Suzuki K Poulose
` (8 subsequent siblings)
11 siblings, 1 reply; 29+ messages in thread
From: Suzuki K Poulose @ 2018-09-12 13:53 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mathieu.poirier, linux-kernel, devicetree, robh, frowand.list,
coresight, leo.yan, suzuki.poulose, xuwei5, lipengcheng8
Switch to updated coresight bindings for hw ports.
Cc: xuwei5@hisilicon.com
Cc: lipengcheng8@huawei.com
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
.../boot/dts/hisilicon/hi6220-coresight.dtsi | 181 +++++++++---------
1 file changed, 86 insertions(+), 95 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
index 7afee5d5087b..68c52f1149be 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
@@ -20,22 +20,18 @@
clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
clock-names = "apb_pclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
+ out-ports {
+ port {
soc_funnel_out: endpoint {
remote-endpoint =
<&etf_in>;
};
};
+ };
- port@1 {
- reg = <0>;
+ in-ports {
+ port {
soc_funnel_in: endpoint {
- slave-mode;
remote-endpoint =
<&acpu_funnel_out>;
};
@@ -49,21 +45,17 @@
clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
clock-names = "apb_pclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
+ in-ports {
+ port {
etf_in: endpoint {
- slave-mode;
remote-endpoint =
<&soc_funnel_out>;
};
};
+ };
- port@1 {
- reg = <0>;
+ out-ports {
+ port {
etf_out: endpoint {
remote-endpoint =
<&replicator_in>;
@@ -77,20 +69,20 @@
clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
clock-names = "apb_pclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
+ in-ports {
+ port {
replicator_in: endpoint {
- slave-mode;
remote-endpoint =
<&etf_out>;
};
};
+ };
- port@1 {
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
replicator_out0: endpoint {
remote-endpoint =
@@ -98,7 +90,7 @@
};
};
- port@2 {
+ port@1 {
reg = <1>;
replicator_out1: endpoint {
remote-endpoint =
@@ -114,14 +106,9 @@
clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
clock-names = "apb_pclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
+ in-ports {
+ port {
etr_in: endpoint {
- slave-mode;
remote-endpoint =
<&replicator_out0>;
};
@@ -135,14 +122,9 @@
clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
clock-names = "apb_pclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
+ in-ports {
+ port {
tpiu_in: endpoint {
- slave-mode;
remote-endpoint =
<&replicator_out1>;
};
@@ -156,85 +138,78 @@
clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
clock-names = "apb_pclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
+ out-ports {
+ port {
acpu_funnel_out: endpoint {
remote-endpoint =
<&soc_funnel_in>;
};
};
+ };
- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
acpu_funnel_in0: endpoint {
- slave-mode;
remote-endpoint =
<&etm0_out>;
};
};
- port@2 {
+ port@1 {
reg = <1>;
acpu_funnel_in1: endpoint {
- slave-mode;
remote-endpoint =
<&etm1_out>;
};
};
- port@3 {
+ port@2 {
reg = <2>;
acpu_funnel_in2: endpoint {
- slave-mode;
remote-endpoint =
<&etm2_out>;
};
};
- port@4 {
+ port@3 {
reg = <3>;
acpu_funnel_in3: endpoint {
- slave-mode;
remote-endpoint =
<&etm3_out>;
};
};
- port@5 {
+ port@4 {
reg = <4>;
acpu_funnel_in4: endpoint {
- slave-mode;
remote-endpoint =
<&etm4_out>;
};
};
- port@6 {
+ port@5 {
reg = <5>;
acpu_funnel_in5: endpoint {
- slave-mode;
remote-endpoint =
<&etm5_out>;
};
};
- port@7 {
+ port@6 {
reg = <6>;
acpu_funnel_in6: endpoint {
- slave-mode;
remote-endpoint =
<&etm6_out>;
};
};
- port@8 {
+ port@7 {
reg = <7>;
acpu_funnel_in7: endpoint {
- slave-mode;
remote-endpoint =
<&etm7_out>;
};
@@ -251,10 +226,12 @@
cpu = <&cpu0>;
- port {
- etm0_out: endpoint {
- remote-endpoint =
- <&acpu_funnel_in0>;
+ out-ports {
+ port {
+ etm0_out: endpoint {
+ remote-endpoint =
+ <&acpu_funnel_in0>;
+ };
};
};
};
@@ -268,10 +245,12 @@
cpu = <&cpu1>;
- port {
- etm1_out: endpoint {
- remote-endpoint =
- <&acpu_funnel_in1>;
+ out-ports {
+ port {
+ etm1_out: endpoint {
+ remote-endpoint =
+ <&acpu_funnel_in1>;
+ };
};
};
};
@@ -285,10 +264,12 @@
cpu = <&cpu2>;
- port {
- etm2_out: endpoint {
- remote-endpoint =
- <&acpu_funnel_in2>;
+ out-ports {
+ port {
+ etm2_out: endpoint {
+ remote-endpoint =
+ <&acpu_funnel_in2>;
+ };
};
};
};
@@ -302,10 +283,12 @@
cpu = <&cpu3>;
- port {
- etm3_out: endpoint {
- remote-endpoint =
- <&acpu_funnel_in3>;
+ out-ports {
+ port {
+ etm3_out: endpoint {
+ remote-endpoint =
+ <&acpu_funnel_in3>;
+ };
};
};
};
@@ -319,10 +302,12 @@
cpu = <&cpu4>;
- port {
- etm4_out: endpoint {
- remote-endpoint =
- <&acpu_funnel_in4>;
+ out-ports {
+ port {
+ etm4_out: endpoint {
+ remote-endpoint =
+ <&acpu_funnel_in4>;
+ };
};
};
};
@@ -336,10 +321,12 @@
cpu = <&cpu5>;
- port {
- etm5_out: endpoint {
- remote-endpoint =
- <&acpu_funnel_in5>;
+ out-ports {
+ port {
+ etm5_out: endpoint {
+ remote-endpoint =
+ <&acpu_funnel_in5>;
+ };
};
};
};
@@ -353,10 +340,12 @@
cpu = <&cpu6>;
- port {
- etm6_out: endpoint {
- remote-endpoint =
- <&acpu_funnel_in6>;
+ out-ports {
+ port {
+ etm6_out: endpoint {
+ remote-endpoint =
+ <&acpu_funnel_in6>;
+ };
};
};
};
@@ -370,10 +359,12 @@
cpu = <&cpu7>;
- port {
- etm7_out: endpoint {
- remote-endpoint =
- <&acpu_funnel_in7>;
+ out-ports {
+ port {
+ etm7_out: endpoint {
+ remote-endpoint =
+ <&acpu_funnel_in7>;
+ };
};
};
};
--
2.19.0
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v2 04/11] arm64: dts: sc9836/sc9860: Update coresight bindings for hardware ports
2018-09-12 13:53 [PATCH v2 00/11] dts: Update coresight device tree bindings Suzuki K Poulose
` (2 preceding siblings ...)
2018-09-12 13:53 ` [PATCH v2 03/11] arm64: dts: hi6220: Update coresight bindings for hardware ports Suzuki K Poulose
@ 2018-09-12 13:53 ` Suzuki K Poulose
2018-09-27 8:51 ` Suzuki K Poulose
2018-09-12 13:53 ` [PATCH v2 05/11] arm64: dts: msm8916: " Suzuki K Poulose
` (7 subsequent siblings)
11 siblings, 1 reply; 29+ messages in thread
From: Suzuki K Poulose @ 2018-09-12 13:53 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mathieu.poirier, linux-kernel, devicetree, robh, frowand.list,
coresight, leo.yan, suzuki.poulose, orsonzhai, zhang.lyra
Switch to the new coresight bindings for hw ports
Cc: orsonzhai@gmail.com
Cc: zhang.lyra@gmail.com
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm64/boot/dts/sprd/sc9836.dtsi | 82 +++++-----
arch/arm64/boot/dts/sprd/sc9860.dtsi | 215 ++++++++++++++-------------
2 files changed, 153 insertions(+), 144 deletions(-)
diff --git a/arch/arm64/boot/dts/sprd/sc9836.dtsi b/arch/arm64/boot/dts/sprd/sc9836.dtsi
index 63894c456969..4bcdbb709c01 100644
--- a/arch/arm64/boot/dts/sprd/sc9836.dtsi
+++ b/arch/arm64/boot/dts/sprd/sc9836.dtsi
@@ -50,10 +50,11 @@
reg = <0 0x10003000 0 0x1000>;
clocks = <&clk26mhz>;
clock-names = "apb_pclk";
- port {
- etf_in: endpoint {
- slave-mode;
- remote-endpoint = <&funnel_out_port0>;
+ in-ports {
+ port {
+ etf_in: endpoint {
+ remote-endpoint = <&funnel_out_port0>;
+ };
};
};
};
@@ -63,55 +64,50 @@
reg = <0 0x10001000 0 0x1000>;
clocks = <&clk26mhz>;
clock-names = "apb_pclk";
- ports {
+
+ out-ports {
+ port {
+ funnel_out_port0: endpoint {
+ remote-endpoint = <&etf_in>;
+ };
+ };
+ };
+
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;
- /* funnel output port */
port@0 {
- reg = <0>;
- funnel_out_port0: endpoint {
- remote-endpoint = <&etf_in>;
- };
- };
-
- /* funnel input port 0-4 */
- port@1 {
reg = <0>;
funnel_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&etm0_out>;
};
};
- port@2 {
+ port@1 {
reg = <1>;
funnel_in_port1: endpoint {
- slave-mode;
remote-endpoint = <&etm1_out>;
};
};
- port@3 {
+ port@2 {
reg = <2>;
funnel_in_port2: endpoint {
- slave-mode;
remote-endpoint = <&etm2_out>;
};
};
- port@4 {
+ port@3 {
reg = <3>;
funnel_in_port3: endpoint {
- slave-mode;
remote-endpoint = <&etm3_out>;
};
};
- port@5 {
+ port@4 {
reg = <4>;
funnel_in_port4: endpoint {
- slave-mode;
remote-endpoint = <&stm_out>;
};
};
@@ -126,9 +122,11 @@
cpu = <&cpu0>;
clocks = <&clk26mhz>;
clock-names = "apb_pclk";
- port {
- etm0_out: endpoint {
- remote-endpoint = <&funnel_in_port0>;
+ out-ports {
+ port {
+ etm0_out: endpoint {
+ remote-endpoint = <&funnel_in_port0>;
+ };
};
};
};
@@ -140,9 +138,11 @@
cpu = <&cpu1>;
clocks = <&clk26mhz>;
clock-names = "apb_pclk";
- port {
- etm1_out: endpoint {
- remote-endpoint = <&funnel_in_port1>;
+ out-ports {
+ port {
+ etm1_out: endpoint {
+ remote-endpoint = <&funnel_in_port1>;
+ };
};
};
};
@@ -154,9 +154,11 @@
cpu = <&cpu2>;
clocks = <&clk26mhz>;
clock-names = "apb_pclk";
- port {
- etm2_out: endpoint {
- remote-endpoint = <&funnel_in_port2>;
+ out-ports {
+ port {
+ etm2_out: endpoint {
+ remote-endpoint = <&funnel_in_port2>;
+ };
};
};
};
@@ -168,9 +170,11 @@
cpu = <&cpu3>;
clocks = <&clk26mhz>;
clock-names = "apb_pclk";
- port {
- etm3_out: endpoint {
- remote-endpoint = <&funnel_in_port3>;
+ out-ports {
+ port {
+ etm3_out: endpoint {
+ remote-endpoint = <&funnel_in_port3>;
+ };
};
};
};
@@ -182,9 +186,11 @@
reg-names = "stm-base", "stm-stimulus-base";
clocks = <&clk26mhz>;
clock-names = "apb_pclk";
- port {
- stm_out: endpoint {
- remote-endpoint = <&funnel_in_port4>;
+ out-ports {
+ port {
+ stm_out: endpoint {
+ remote-endpoint = <&funnel_in_port4>;
+ };
};
};
};
diff --git a/arch/arm64/boot/dts/sprd/sc9860.dtsi b/arch/arm64/boot/dts/sprd/sc9860.dtsi
index 48f5928ed45c..5f57bf055cde 100644
--- a/arch/arm64/boot/dts/sprd/sc9860.dtsi
+++ b/arch/arm64/boot/dts/sprd/sc9860.dtsi
@@ -304,30 +304,29 @@
reg = <0 0x10001000 0 0x1000>;
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
+ out-ports {
+ port {
soc_funnel_out_port: endpoint {
remote-endpoint = <&etb_in>;
};
};
+ };
- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
soc_funnel_in_port0: endpoint {
- slave-mode;
remote-endpoint =
<&main_funnel_out_port>;
};
};
- port@2 {
+ port@4 {
reg = <4>;
soc_funnel_in_port1: endpoint {
- slave-mode;
remote-endpoint =
<&stm_out_port>;
};
@@ -340,11 +339,12 @@
reg = <0 0x10003000 0 0x1000>;
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- port {
- etb_in: endpoint {
- slave-mode;
- remote-endpoint =
- <&soc_funnel_out_port>;
+ out-ports {
+ port {
+ etb_in: endpoint {
+ remote-endpoint =
+ <&soc_funnel_out_port>;
+ };
};
};
};
@@ -356,10 +356,12 @@
reg-names = "stm-base", "stm-stimulus-base";
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- port {
- stm_out_port: endpoint {
- remote-endpoint =
- <&soc_funnel_in_port1>;
+ out-ports {
+ port {
+ stm_out_port: endpoint {
+ remote-endpoint =
+ <&soc_funnel_in_port1>;
+ };
};
};
};
@@ -369,38 +371,36 @@
reg = <0 0x11001000 0 0x1000>;
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
+ out-ports {
+ port {
cluster0_funnel_out_port: endpoint {
remote-endpoint =
<&cluster0_etf_in>;
};
};
+ };
- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
cluster0_funnel_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&etm0_out>;
};
};
- port@2 {
+ port@1 {
reg = <1>;
cluster0_funnel_in_port1: endpoint {
- slave-mode;
remote-endpoint = <&etm1_out>;
};
};
- port@3 {
+ port@2 {
reg = <2>;
cluster0_funnel_in_port2: endpoint {
- slave-mode;
remote-endpoint = <&etm2_out>;
};
};
@@ -408,7 +408,6 @@
port@4 {
reg = <4>;
cluster0_funnel_in_port3: endpoint {
- slave-mode;
remote-endpoint = <&etm3_out>;
};
};
@@ -420,46 +419,43 @@
reg = <0 0x11002000 0 0x1000>;
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
+ out-ports {
+ port {
cluster1_funnel_out_port: endpoint {
remote-endpoint =
<&cluster1_etf_in>;
};
};
+ };
- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
cluster1_funnel_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&etm4_out>;
};
};
- port@2 {
+ port@1 {
reg = <1>;
cluster1_funnel_in_port1: endpoint {
- slave-mode;
remote-endpoint = <&etm5_out>;
};
};
- port@3 {
+ port@2 {
reg = <2>;
cluster1_funnel_in_port2: endpoint {
- slave-mode;
remote-endpoint = <&etm6_out>;
};
};
- port@4 {
+ port@3 {
reg = <3>;
cluster1_funnel_in_port3: endpoint {
- slave-mode;
remote-endpoint = <&etm7_out>;
};
};
@@ -472,22 +468,18 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
+ out-ports {
+ port {
cluster0_etf_out: endpoint {
remote-endpoint =
<&main_funnel_in_port0>;
};
};
+ };
- port@1 {
- reg = <0>;
+ in-ports {
+ port {
cluster0_etf_in: endpoint {
- slave-mode;
remote-endpoint =
<&cluster0_funnel_out_port>;
};
@@ -501,22 +493,18 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
+ out-ports {
+ port {
cluster1_etf_out: endpoint {
remote-endpoint =
<&main_funnel_in_port1>;
};
};
+ };
- port@1 {
- reg = <0>;
+ in-ports {
+ port {
cluster1_etf_in: endpoint {
- slave-mode;
remote-endpoint =
<&cluster1_funnel_out_port>;
};
@@ -530,31 +518,30 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
+ out-ports {
+ port {
main_funnel_out_port: endpoint {
remote-endpoint =
<&soc_funnel_in_port0>;
};
};
+ };
- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
main_funnel_in_port0: endpoint {
- slave-mode;
remote-endpoint =
<&cluster0_etf_out>;
};
};
- port@2 {
+ port@1 {
reg = <1>;
main_funnel_in_port1: endpoint {
- slave-mode;
remote-endpoint =
<&cluster1_etf_out>;
};
@@ -569,10 +556,12 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- port {
- etm0_out: endpoint {
- remote-endpoint =
- <&cluster0_funnel_in_port0>;
+ out-ports {
+ port {
+ etm0_out: endpoint {
+ remote-endpoint =
+ <&cluster0_funnel_in_port0>;
+ };
};
};
};
@@ -584,10 +573,12 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- port {
- etm1_out: endpoint {
- remote-endpoint =
- <&cluster0_funnel_in_port1>;
+ out-ports {
+ port {
+ etm1_out: endpoint {
+ remote-endpoint =
+ <&cluster0_funnel_in_port1>;
+ };
};
};
};
@@ -599,10 +590,12 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- port {
- etm2_out: endpoint {
- remote-endpoint =
- <&cluster0_funnel_in_port2>;
+ out-ports {
+ port {
+ etm2_out: endpoint {
+ remote-endpoint =
+ <&cluster0_funnel_in_port2>;
+ };
};
};
};
@@ -614,10 +607,12 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- port {
- etm3_out: endpoint {
- remote-endpoint =
- <&cluster0_funnel_in_port3>;
+ out-ports {
+ port {
+ etm3_out: endpoint {
+ remote-endpoint =
+ <&cluster0_funnel_in_port3>;
+ };
};
};
};
@@ -629,10 +624,12 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- port {
- etm4_out: endpoint {
- remote-endpoint =
- <&cluster1_funnel_in_port0>;
+ out-ports {
+ port {
+ etm4_out: endpoint {
+ remote-endpoint =
+ <&cluster1_funnel_in_port0>;
+ };
};
};
};
@@ -644,10 +641,12 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- port {
- etm5_out: endpoint {
- remote-endpoint =
- <&cluster1_funnel_in_port1>;
+ out-ports {
+ port {
+ etm5_out: endpoint {
+ remote-endpoint =
+ <&cluster1_funnel_in_port1>;
+ };
};
};
};
@@ -659,10 +658,12 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- port {
- etm6_out: endpoint {
- remote-endpoint =
- <&cluster1_funnel_in_port2>;
+ out-ports {
+ port {
+ etm6_out: endpoint {
+ remote-endpoint =
+ <&cluster1_funnel_in_port2>;
+ };
};
};
};
@@ -674,10 +675,12 @@
clocks = <&ext_26m>;
clock-names = "apb_pclk";
- port {
- etm7_out: endpoint {
- remote-endpoint =
- <&cluster1_funnel_in_port3>;
+ out-ports {
+ port {
+ etm7_out: endpoint {
+ remote-endpoint =
+ <&cluster1_funnel_in_port3>;
+ };
};
};
};
--
2.19.0
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v2 05/11] arm64: dts: msm8916: Update coresight bindings for hardware ports
2018-09-12 13:53 [PATCH v2 00/11] dts: Update coresight device tree bindings Suzuki K Poulose
` (3 preceding siblings ...)
2018-09-12 13:53 ` [PATCH v2 04/11] arm64: dts: sc9836/sc9860: " Suzuki K Poulose
@ 2018-09-12 13:53 ` Suzuki K Poulose
2018-09-27 8:18 ` Suzuki K Poulose
2018-09-12 13:53 ` [PATCH v2 06/11] arm: dts: hip04: " Suzuki K Poulose
` (6 subsequent siblings)
11 siblings, 1 reply; 29+ messages in thread
From: Suzuki K Poulose @ 2018-09-12 13:53 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mathieu.poirier, linux-kernel, devicetree, robh, frowand.list,
coresight, leo.yan, suzuki.poulose, Andy Gross, David Brown,
Ivan T . Ivanov
Switch to updated coresight bindings for hw ports
Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
Changes since v1:
- Fixed TPIU port direction
- Use better subject tag for the patch
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 95 ++++++++++++++-------------
1 file changed, 51 insertions(+), 44 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 7b32b8990d62..fe375a9c218e 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -1099,10 +1099,11 @@
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
- port {
- tpiu_in: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out1>;
+ in-ports {
+ port {
+ tpiu_in: endpoint {
+ remote-endpoint = <&replicator_out1>;
+ };
};
};
};
@@ -1114,7 +1115,7 @@
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -1132,12 +1133,13 @@
port@4 {
reg = <4>;
funnel0_in4: endpoint {
- slave-mode;
remote-endpoint = <&funnel1_out>;
};
};
- port@8 {
- reg = <0>;
+ };
+
+ out-ports {
+ port {
funnel0_out: endpoint {
remote-endpoint = <&etf_in>;
};
@@ -1152,7 +1154,7 @@
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -1168,10 +1170,11 @@
remote-endpoint = <&tpiu_in>;
};
};
- port@2 {
- reg = <0>;
+ };
+
+ in-ports {
+ port {
replicator_in: endpoint {
- slave-mode;
remote-endpoint = <&etf_out>;
};
};
@@ -1185,19 +1188,16 @@
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
+ in-ports {
+ port {
etf_in: endpoint {
- slave-mode;
remote-endpoint = <&funnel0_out>;
};
};
- port@1 {
- reg = <0>;
+ };
+
+ out-ports {
+ port {
etf_out: endpoint {
remote-endpoint = <&replicator_in>;
};
@@ -1212,10 +1212,11 @@
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
- port {
- etr_in: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out0>;
+ in-ports {
+ port {
+ etr_in: endpoint {
+ remote-endpoint = <&replicator_out0>;
+ };
};
};
};
@@ -1227,40 +1228,38 @@
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
funnel1_in0: endpoint {
- slave-mode;
remote-endpoint = <&etm0_out>;
};
};
port@1 {
reg = <1>;
funnel1_in1: endpoint {
- slave-mode;
remote-endpoint = <&etm1_out>;
};
};
port@2 {
reg = <2>;
funnel1_in2: endpoint {
- slave-mode;
remote-endpoint = <&etm2_out>;
};
};
port@3 {
reg = <3>;
funnel1_in3: endpoint {
- slave-mode;
remote-endpoint = <&etm3_out>;
};
};
- port@4 {
- reg = <0>;
+ };
+
+ out-ports {
+ port {
funnel1_out: endpoint {
remote-endpoint = <&funnel0_in4>;
};
@@ -1309,9 +1308,11 @@
cpu = <&CPU0>;
- port {
- etm0_out: endpoint {
- remote-endpoint = <&funnel1_in0>;
+ out-ports {
+ port {
+ etm0_out: endpoint {
+ remote-endpoint = <&funnel1_in0>;
+ };
};
};
};
@@ -1325,9 +1326,11 @@
cpu = <&CPU1>;
- port {
- etm1_out: endpoint {
- remote-endpoint = <&funnel1_in1>;
+ out-ports {
+ port {
+ etm1_out: endpoint {
+ remote-endpoint = <&funnel1_in1>;
+ };
};
};
};
@@ -1341,9 +1344,11 @@
cpu = <&CPU2>;
- port {
- etm2_out: endpoint {
- remote-endpoint = <&funnel1_in2>;
+ out-ports {
+ port {
+ etm2_out: endpoint {
+ remote-endpoint = <&funnel1_in2>;
+ };
};
};
};
@@ -1357,9 +1362,11 @@
cpu = <&CPU3>;
- port {
- etm3_out: endpoint {
- remote-endpoint = <&funnel1_in3>;
+ out-ports {
+ port {
+ etm3_out: endpoint {
+ remote-endpoint = <&funnel1_in3>;
+ };
};
};
};
--
2.19.0
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v2 06/11] arm: dts: hip04: Update coresight bindings for hardware ports
2018-09-12 13:53 [PATCH v2 00/11] dts: Update coresight device tree bindings Suzuki K Poulose
` (4 preceding siblings ...)
2018-09-12 13:53 ` [PATCH v2 05/11] arm64: dts: msm8916: " Suzuki K Poulose
@ 2018-09-12 13:53 ` Suzuki K Poulose
2018-09-21 14:06 ` Wei Xu
2018-09-12 13:53 ` [PATCH v2 07/11] arm: dts: imx7: Update coresight binding " Suzuki K Poulose
` (5 subsequent siblings)
11 siblings, 1 reply; 29+ messages in thread
From: Suzuki K Poulose @ 2018-09-12 13:53 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mathieu.poirier, linux-kernel, devicetree, robh, frowand.list,
coresight, leo.yan, suzuki.poulose, Wei Xu
Switch to the new the hardware port bindings.
Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm/boot/dts/hip04.dtsi | 346 ++++++++++++++++++-----------------
1 file changed, 176 insertions(+), 170 deletions(-)
diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi
index 44044f275115..0f917b272ff3 100644
--- a/arch/arm/boot/dts/hip04.dtsi
+++ b/arch/arm/boot/dts/hip04.dtsi
@@ -277,10 +277,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
- port {
- etb0_in_port: endpoint@0 {
- slave-mode;
- remote-endpoint = <&replicator0_out_port0>;
+ in-ports {
+ port {
+ etb0_in_port: endpoint@0 {
+ remote-endpoint = <&replicator0_out_port0>;
+ };
};
};
};
@@ -291,10 +292,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
- port {
- etb1_in_port: endpoint@0 {
- slave-mode;
- remote-endpoint = <&replicator1_out_port0>;
+ in-ports {
+ port {
+ etb1_in_port: endpoint@0 {
+ remote-endpoint = <&replicator1_out_port0>;
+ };
};
};
};
@@ -305,10 +307,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
- port {
- etb2_in_port: endpoint@0 {
- slave-mode;
- remote-endpoint = <&replicator2_out_port0>;
+ in-ports {
+ port {
+ etb2_in_port: endpoint@0 {
+ remote-endpoint = <&replicator2_out_port0>;
+ };
};
};
};
@@ -319,10 +322,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
- port {
- etb3_in_port: endpoint@0 {
- slave-mode;
- remote-endpoint = <&replicator3_out_port0>;
+ in-ports {
+ port {
+ etb3_in_port: endpoint@0 {
+ remote-endpoint = <&replicator3_out_port0>;
+ };
};
};
};
@@ -333,10 +337,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
- port {
- tpiu_in_port: endpoint@0 {
- slave-mode;
- remote-endpoint = <&funnel4_out_port0>;
+ in-ports {
+ port {
+ tpiu_in_port: endpoint@0 {
+ remote-endpoint = <&funnel4_out_port0>;
+ };
};
};
};
@@ -347,7 +352,7 @@
*/
compatible = "arm,coresight-replicator";
- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -365,12 +370,11 @@
remote-endpoint = <&funnel4_in_port0>;
};
};
+ };
- /* replicator input port */
- port@2 {
- reg = <0>;
+ in-ports {
+ port {
replicator0_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&funnel0_out_port0>;
};
};
@@ -383,7 +387,7 @@
*/
compatible = "arm,coresight-replicator";
- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -401,12 +405,11 @@
remote-endpoint = <&funnel4_in_port1>;
};
};
+ };
- /* replicator input port */
- port@2 {
- reg = <0>;
+ in-ports {
+ port {
replicator1_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&funnel1_out_port0>;
};
};
@@ -419,11 +422,10 @@
*/
compatible = "arm,coresight-replicator";
- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;
- /* replicator output ports */
port@0 {
reg = <0>;
replicator2_out_port0: endpoint {
@@ -437,12 +439,11 @@
remote-endpoint = <&funnel4_in_port2>;
};
};
+ };
- /* replicator input port */
- port@2 {
- reg = <0>;
+ in-ports {
+ port {
replicator2_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&funnel2_out_port0>;
};
};
@@ -455,11 +456,10 @@
*/
compatible = "arm,coresight-replicator";
- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;
- /* replicator output ports */
port@0 {
reg = <0>;
replicator3_out_port0: endpoint {
@@ -473,12 +473,11 @@
remote-endpoint = <&funnel4_in_port3>;
};
};
+ };
- /* replicator input port */
- port@2 {
- reg = <0>;
+ in-ports {
+ port {
replicator3_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&funnel3_out_port0>;
};
};
@@ -491,48 +490,43 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* funnel output port */
- port@0 {
- reg = <0>;
+ out-ports {
+ port {
funnel0_out_port0: endpoint {
remote-endpoint =
<&replicator0_in_port0>;
};
};
+ };
- /* funnel input ports */
- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
funnel0_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&ptm0_out_port>;
};
};
- port@2 {
+ port@1 {
reg = <1>;
funnel0_in_port1: endpoint {
- slave-mode;
remote-endpoint = <&ptm1_out_port>;
};
};
- port@3 {
+ port@2 {
reg = <2>;
funnel0_in_port2: endpoint {
- slave-mode;
remote-endpoint = <&ptm2_out_port>;
};
};
- port@4 {
+ port@3 {
reg = <3>;
funnel0_in_port3: endpoint {
- slave-mode;
remote-endpoint = <&ptm3_out_port>;
};
};
@@ -545,48 +539,43 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* funnel output port */
- port@0 {
- reg = <0>;
+ out-ports {
+ port {
funnel1_out_port0: endpoint {
remote-endpoint =
<&replicator1_in_port0>;
};
};
+ };
- /* funnel input ports */
- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
funnel1_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&ptm4_out_port>;
};
};
- port@2 {
+ port@1 {
reg = <1>;
funnel1_in_port1: endpoint {
- slave-mode;
remote-endpoint = <&ptm5_out_port>;
};
};
- port@3 {
+ port@2 {
reg = <2>;
funnel1_in_port2: endpoint {
- slave-mode;
remote-endpoint = <&ptm6_out_port>;
};
};
- port@4 {
+ port@3 {
reg = <3>;
funnel1_in_port3: endpoint {
- slave-mode;
remote-endpoint = <&ptm7_out_port>;
};
};
@@ -599,48 +588,43 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* funnel output port */
- port@0 {
- reg = <0>;
+ out-ports {
+ port {
funnel2_out_port0: endpoint {
remote-endpoint =
<&replicator2_in_port0>;
};
};
+ };
- /* funnel input ports */
- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
funnel2_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&ptm8_out_port>;
};
};
- port@2 {
+ port@1 {
reg = <1>;
funnel2_in_port1: endpoint {
- slave-mode;
remote-endpoint = <&ptm9_out_port>;
};
};
- port@3 {
+ port@2 {
reg = <2>;
funnel2_in_port2: endpoint {
- slave-mode;
remote-endpoint = <&ptm10_out_port>;
};
};
- port@4 {
+ port@3 {
reg = <3>;
funnel2_in_port3: endpoint {
- slave-mode;
remote-endpoint = <&ptm11_out_port>;
};
};
@@ -653,48 +637,43 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* funnel output port */
- port@0 {
- reg = <0>;
+ out-ports {
+ port {
funnel3_out_port0: endpoint {
remote-endpoint =
<&replicator3_in_port0>;
};
};
+ };
- /* funnel input ports */
- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
funnel3_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&ptm12_out_port>;
};
};
- port@2 {
+ port@1 {
reg = <1>;
funnel3_in_port1: endpoint {
- slave-mode;
remote-endpoint = <&ptm13_out_port>;
};
};
- port@3 {
+ port@2 {
reg = <2>;
funnel3_in_port2: endpoint {
- slave-mode;
remote-endpoint = <&ptm14_out_port>;
};
};
- port@4 {
+ port@3 {
reg = <3>;
funnel3_in_port3: endpoint {
- slave-mode;
remote-endpoint = <&ptm15_out_port>;
};
};
@@ -707,50 +686,45 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* funnel output port */
- port@0 {
- reg = <0>;
+ out-ports {
+ port {
funnel4_out_port0: endpoint {
remote-endpoint = <&tpiu_in_port>;
};
};
+ };
- /* funnel input ports */
- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
funnel4_in_port0: endpoint {
- slave-mode;
remote-endpoint =
<&replicator0_out_port1>;
};
};
- port@2 {
+ port@1 {
reg = <1>;
funnel4_in_port1: endpoint {
- slave-mode;
remote-endpoint =
<&replicator1_out_port1>;
};
};
- port@3 {
+ port@2 {
reg = <2>;
funnel4_in_port2: endpoint {
- slave-mode;
remote-endpoint =
<&replicator2_out_port1>;
};
};
- port@4 {
+ port@3 {
reg = <3>;
funnel4_in_port3: endpoint {
- slave-mode;
remote-endpoint =
<&replicator3_out_port1>;
};
@@ -765,9 +739,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU0>;
- port {
- ptm0_out_port: endpoint {
- remote-endpoint = <&funnel0_in_port0>;
+ out-ports {
+ port {
+ ptm0_out_port: endpoint {
+ remote-endpoint = <&funnel0_in_port0>;
+ };
};
};
};
@@ -779,9 +755,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU1>;
- port {
- ptm1_out_port: endpoint {
- remote-endpoint = <&funnel0_in_port1>;
+ out-ports {
+ port {
+ ptm1_out_port: endpoint {
+ remote-endpoint = <&funnel0_in_port1>;
+ };
};
};
};
@@ -793,9 +771,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU2>;
- port {
- ptm2_out_port: endpoint {
- remote-endpoint = <&funnel0_in_port2>;
+ out-ports {
+ port {
+ ptm2_out_port: endpoint {
+ remote-endpoint = <&funnel0_in_port2>;
+ };
};
};
};
@@ -807,9 +787,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU3>;
- port {
- ptm3_out_port: endpoint {
- remote-endpoint = <&funnel0_in_port3>;
+ out-ports {
+ port {
+ ptm3_out_port: endpoint {
+ remote-endpoint = <&funnel0_in_port3>;
+ };
};
};
};
@@ -821,9 +803,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU4>;
- port {
- ptm4_out_port: endpoint {
- remote-endpoint = <&funnel1_in_port0>;
+ out-ports {
+ port {
+ ptm4_out_port: endpoint {
+ remote-endpoint = <&funnel1_in_port0>;
+ };
};
};
};
@@ -835,9 +819,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU5>;
- port {
- ptm5_out_port: endpoint {
- remote-endpoint = <&funnel1_in_port1>;
+ out-ports {
+ port {
+ ptm5_out_port: endpoint {
+ remote-endpoint = <&funnel1_in_port1>;
+ };
};
};
};
@@ -849,9 +835,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU6>;
- port {
- ptm6_out_port: endpoint {
- remote-endpoint = <&funnel1_in_port2>;
+ out-ports {
+ port {
+ ptm6_out_port: endpoint {
+ remote-endpoint = <&funnel1_in_port2>;
+ };
};
};
};
@@ -863,9 +851,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU7>;
- port {
- ptm7_out_port: endpoint {
- remote-endpoint = <&funnel1_in_port3>;
+ out-ports {
+ port {
+ ptm7_out_port: endpoint {
+ remote-endpoint = <&funnel1_in_port3>;
+ };
};
};
};
@@ -877,9 +867,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU8>;
- port {
- ptm8_out_port: endpoint {
- remote-endpoint = <&funnel2_in_port0>;
+ out-ports {
+ port {
+ ptm8_out_port: endpoint {
+ remote-endpoint = <&funnel2_in_port0>;
+ };
};
};
};
@@ -890,9 +882,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU9>;
- port {
- ptm9_out_port: endpoint {
- remote-endpoint = <&funnel2_in_port1>;
+ out-ports {
+ port {
+ ptm9_out_port: endpoint {
+ remote-endpoint = <&funnel2_in_port1>;
+ };
};
};
};
@@ -904,9 +898,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU10>;
- port {
- ptm10_out_port: endpoint {
- remote-endpoint = <&funnel2_in_port2>;
+ out-ports {
+ port {
+ ptm10_out_port: endpoint {
+ remote-endpoint = <&funnel2_in_port2>;
+ };
};
};
};
@@ -918,9 +914,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU11>;
- port {
- ptm11_out_port: endpoint {
- remote-endpoint = <&funnel2_in_port3>;
+ out-ports {
+ port {
+ ptm11_out_port: endpoint {
+ remote-endpoint = <&funnel2_in_port3>;
+ };
};
};
};
@@ -932,9 +930,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU12>;
- port {
- ptm12_out_port: endpoint {
- remote-endpoint = <&funnel3_in_port0>;
+ out-ports {
+ port {
+ ptm12_out_port: endpoint {
+ remote-endpoint = <&funnel3_in_port0>;
+ };
};
};
};
@@ -946,9 +946,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU13>;
- port {
- ptm13_out_port: endpoint {
- remote-endpoint = <&funnel3_in_port1>;
+ out-ports {
+ port {
+ ptm13_out_port: endpoint {
+ remote-endpoint = <&funnel3_in_port1>;
+ };
};
};
};
@@ -960,9 +962,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU14>;
- port {
- ptm14_out_port: endpoint {
- remote-endpoint = <&funnel3_in_port2>;
+ out-ports {
+ port {
+ ptm14_out_port: endpoint {
+ remote-endpoint = <&funnel3_in_port2>;
+ };
};
};
};
@@ -974,9 +978,11 @@
clocks = <&clk_375m>;
clock-names = "apb_pclk";
cpu = <&CPU15>;
- port {
- ptm15_out_port: endpoint {
- remote-endpoint = <&funnel3_in_port3>;
+ out-ports {
+ port {
+ ptm15_out_port: endpoint {
+ remote-endpoint = <&funnel3_in_port3>;
+ };
};
};
};
--
2.19.0
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v2 07/11] arm: dts: imx7: Update coresight binding for hardware ports
2018-09-12 13:53 [PATCH v2 00/11] dts: Update coresight device tree bindings Suzuki K Poulose
` (5 preceding siblings ...)
2018-09-12 13:53 ` [PATCH v2 06/11] arm: dts: hip04: " Suzuki K Poulose
@ 2018-09-12 13:53 ` Suzuki K Poulose
2018-09-26 2:24 ` Shawn Guo
2018-09-12 13:53 ` [PATCH v2 08/11] arm: dts: omap: Update coresight bindings " Suzuki K Poulose
` (4 subsequent siblings)
11 siblings, 1 reply; 29+ messages in thread
From: Suzuki K Poulose @ 2018-09-12 13:53 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mathieu.poirier, linux-kernel, devicetree, robh, frowand.list,
coresight, leo.yan, suzuki.poulose, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam
Switch to the updated coresight bindings.
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm/boot/dts/imx7d.dtsi | 14 +++---
arch/arm/boot/dts/imx7s.dtsi | 82 ++++++++++++++++--------------------
2 files changed, 46 insertions(+), 50 deletions(-)
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index 7cbc2ffa4b3a..a96d031ad46c 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -63,9 +63,11 @@
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";
- port {
- etm1_out_port: endpoint {
- remote-endpoint = <&ca_funnel_in_port1>;
+ out-ports {
+ port {
+ etm1_out_port: endpoint {
+ remote-endpoint = <&ca_funnel_in_port1>;
+ };
};
};
};
@@ -148,11 +150,13 @@
};
};
-&ca_funnel_ports {
+&ca_funnel_in_ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
port@1 {
reg = <1>;
ca_funnel_in_port1: endpoint {
- slave-mode;
remote-endpoint = <&etm1_out_port>;
};
};
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index a052198f6e96..b65cfc6a8841 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -106,7 +106,7 @@
*/
compatible = "arm,coresight-replicator";
- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;
/* replicator output ports */
@@ -123,12 +123,11 @@
remote-endpoint = <&etr_in_port>;
};
};
+ };
- /* replicator input port */
- port@2 {
- reg = <0>;
+ in-ports {
+ port {
replicator_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&etf_out_port>;
};
};
@@ -168,28 +167,23 @@
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";
- ca_funnel_ports: ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* funnel input ports */
- port@0 {
- reg = <0>;
+ ca_funnel_in_ports: in-ports {
+ port {
ca_funnel_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&etm0_out_port>;
};
};
- /* funnel output port */
- port@2 {
- reg = <0>;
+ /* the other input ports are not connect to anything */
+ };
+
+ out-ports {
+ port {
ca_funnel_out_port0: endpoint {
remote-endpoint = <&hugo_funnel_in_port0>;
};
};
- /* the other input ports are not connect to anything */
};
};
@@ -200,9 +194,11 @@
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";
- port {
- etm0_out_port: endpoint {
- remote-endpoint = <&ca_funnel_in_port0>;
+ out-ports {
+ port {
+ etm0_out_port: endpoint {
+ remote-endpoint = <&ca_funnel_in_port0>;
+ };
};
};
};
@@ -213,15 +209,13 @@
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";
- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;
- /* funnel input ports */
port@0 {
reg = <0>;
hugo_funnel_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&ca_funnel_out_port0>;
};
};
@@ -229,18 +223,18 @@
port@1 {
reg = <1>;
hugo_funnel_in_port1: endpoint {
- slave-mode; /* M4 input */
+ /* M4 input */
};
};
+ /* the other input ports are not connect to anything */
+ };
- port@2 {
- reg = <0>;
+ out-ports {
+ port {
hugo_funnel_out_port0: endpoint {
remote-endpoint = <&etf_in_port>;
};
};
-
- /* the other input ports are not connect to anything */
};
};
@@ -250,20 +244,16 @@
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
+ in-ports {
+ port {
etf_in_port: endpoint {
- slave-mode;
remote-endpoint = <&hugo_funnel_out_port0>;
};
};
+ };
- port@1 {
- reg = <0>;
+ out-ports {
+ port {
etf_out_port: endpoint {
remote-endpoint = <&replicator_in_port0>;
};
@@ -277,10 +267,11 @@
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";
- port {
- etr_in_port: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out_port1>;
+ in-ports {
+ port {
+ etr_in_port: endpoint {
+ remote-endpoint = <&replicator_out_port1>;
+ };
};
};
};
@@ -291,10 +282,11 @@
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";
- port {
- tpiu_in_port: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out_port0>;
+ in-ports {
+ port {
+ tpiu_in_port: endpoint {
+ remote-endpoint = <&replicator_out_port0>;
+ };
};
};
};
--
2.19.0
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v2 08/11] arm: dts: omap: Update coresight bindings for hardware ports
2018-09-12 13:53 [PATCH v2 00/11] dts: Update coresight device tree bindings Suzuki K Poulose
` (6 preceding siblings ...)
2018-09-12 13:53 ` [PATCH v2 07/11] arm: dts: imx7: Update coresight binding " Suzuki K Poulose
@ 2018-09-12 13:53 ` Suzuki K Poulose
2018-09-20 22:01 ` Tony Lindgren
2018-09-12 13:53 ` [PATCH v2 09/11] arm: dts: qcom: " Suzuki K Poulose
` (3 subsequent siblings)
11 siblings, 1 reply; 29+ messages in thread
From: Suzuki K Poulose @ 2018-09-12 13:53 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mathieu.poirier, linux-kernel, devicetree, robh, frowand.list,
coresight, leo.yan, suzuki.poulose, linux-omap,
Benoît Cousson, Tony Lindgren
Switch to the new coresight bindings for hardware ports
Cc: linux-omap@vger.kernel.org
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm/boot/dts/omap3-beagle-xm.dts | 17 ++++++++++-------
arch/arm/boot/dts/omap3-beagle.dts | 17 ++++++++++-------
2 files changed, 20 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index d80587de0bbf..9985ee2aae0c 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -160,10 +160,11 @@
clocks = <&emu_src_ck>;
clock-names = "apb_pclk";
- port {
- etb_in: endpoint {
- slave-mode;
- remote-endpoint = <&etm_out>;
+ in-ports {
+ port {
+ etb_in: endpoint {
+ remote-endpoint = <&etm_out>;
+ };
};
};
};
@@ -174,9 +175,11 @@
clocks = <&emu_src_ck>;
clock-names = "apb_pclk";
- port {
- etm_out: endpoint {
- remote-endpoint = <&etb_in>;
+ out-ports {
+ port {
+ etm_out: endpoint {
+ remote-endpoint = <&etb_in>;
+ };
};
};
};
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index 3ca8991a6c3e..91bb50ad9a4f 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -147,10 +147,11 @@
clocks = <&emu_src_ck>;
clock-names = "apb_pclk";
- port {
- etb_in: endpoint {
- slave-mode;
- remote-endpoint = <&etm_out>;
+ in-ports {
+ port {
+ etb_in: endpoint {
+ remote-endpoint = <&etm_out>;
+ };
};
};
};
@@ -161,9 +162,11 @@
clocks = <&emu_src_ck>;
clock-names = "apb_pclk";
- port {
- etm_out: endpoint {
- remote-endpoint = <&etb_in>;
+ out-ports {
+ port {
+ etm_out: endpoint {
+ remote-endpoint = <&etb_in>;
+ };
};
};
};
--
2.19.0
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v2 09/11] arm: dts: qcom: Update coresight bindings for hardware ports
2018-09-12 13:53 [PATCH v2 00/11] dts: Update coresight device tree bindings Suzuki K Poulose
` (7 preceding siblings ...)
2018-09-12 13:53 ` [PATCH v2 08/11] arm: dts: omap: Update coresight bindings " Suzuki K Poulose
@ 2018-09-12 13:53 ` Suzuki K Poulose
2018-09-12 13:53 ` [PATCH v2 10/11] arm: dts: sama5d2: " Suzuki K Poulose
` (2 subsequent siblings)
11 siblings, 0 replies; 29+ messages in thread
From: Suzuki K Poulose @ 2018-09-12 13:53 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mathieu.poirier, linux-kernel, devicetree, robh, frowand.list,
coresight, leo.yan, suzuki.poulose, Andy Gross, David Brown
Switch to the new hardware port bindings for coresight
Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 71 ++++++++++---------
arch/arm/boot/dts/qcom-msm8974.dtsi | 104 +++++++++++++++-------------
2 files changed, 96 insertions(+), 79 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 4a99c9255104..48c3cf427610 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -1611,10 +1611,11 @@
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
- port {
- etb_in: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out0>;
+ in-ports {
+ port {
+ etb_in: endpoint {
+ remote-endpoint = <&replicator_out0>;
+ };
};
};
};
@@ -1626,10 +1627,11 @@
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
- port {
- tpiu_in: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out1>;
+ in-ports {
+ port {
+ tpiu_in: endpoint {
+ remote-endpoint = <&replicator_out1>;
+ };
};
};
};
@@ -1640,7 +1642,7 @@
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -1656,10 +1658,11 @@
remote-endpoint = <&tpiu_in>;
};
};
- port@2 {
- reg = <0>;
+ };
+
+ in-ports {
+ port {
replicator_in: endpoint {
- slave-mode;
remote-endpoint = <&funnel_out>;
};
};
@@ -1673,7 +1676,7 @@
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -1687,33 +1690,31 @@
port@0 {
reg = <0>;
funnel_in0: endpoint {
- slave-mode;
remote-endpoint = <&etm0_out>;
};
};
port@1 {
reg = <1>;
funnel_in1: endpoint {
- slave-mode;
remote-endpoint = <&etm1_out>;
};
};
port@4 {
reg = <4>;
funnel_in4: endpoint {
- slave-mode;
remote-endpoint = <&etm2_out>;
};
};
port@5 {
reg = <5>;
funnel_in5: endpoint {
- slave-mode;
remote-endpoint = <&etm3_out>;
};
};
- port@8 {
- reg = <0>;
+ };
+
+ out-ports {
+ port {
funnel_out: endpoint {
remote-endpoint = <&replicator_in>;
};
@@ -1730,9 +1731,11 @@
cpu = <&CPU0>;
- port {
- etm0_out: endpoint {
- remote-endpoint = <&funnel_in0>;
+ out-ports {
+ port {
+ etm0_out: endpoint {
+ remote-endpoint = <&funnel_in0>;
+ };
};
};
};
@@ -1746,9 +1749,11 @@
cpu = <&CPU1>;
- port {
- etm1_out: endpoint {
- remote-endpoint = <&funnel_in1>;
+ out-ports {
+ port {
+ etm1_out: endpoint {
+ remote-endpoint = <&funnel_in1>;
+ };
};
};
};
@@ -1762,9 +1767,11 @@
cpu = <&CPU2>;
- port {
- etm2_out: endpoint {
- remote-endpoint = <&funnel_in4>;
+ out-ports {
+ port {
+ etm2_out: endpoint {
+ remote-endpoint = <&funnel_in4>;
+ };
};
};
};
@@ -1778,9 +1785,11 @@
cpu = <&CPU3>;
- port {
- etm3_out: endpoint {
- remote-endpoint = <&funnel_in5>;
+ out-ports {
+ port {
+ etm3_out: endpoint {
+ remote-endpoint = <&funnel_in5>;
+ };
};
};
};
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index d9019a49b292..3a4fb513a088 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -770,10 +770,11 @@
clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
- port {
- etr_in: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out0>;
+ in-ports {
+ port {
+ etr_in: endpoint {
+ remote-endpoint = <&replicator_out0>;
+ };
};
};
};
@@ -785,10 +786,11 @@
clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
- port {
- tpiu_in: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out1>;
+ in-ports {
+ port {
+ tpiu_in: endpoint {
+ remote-endpoint = <&replicator_out1>;
+ };
};
};
};
@@ -800,7 +802,7 @@
clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -816,10 +818,11 @@
remote-endpoint = <&tpiu_in>;
};
};
- port@2 {
- reg = <0>;
+ };
+
+ in-ports {
+ port {
replicator_in: endpoint {
- slave-mode;
remote-endpoint = <&etf_out>;
};
};
@@ -833,20 +836,17 @@
clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
+ out-ports {
+ port {
etf_out: endpoint {
remote-endpoint = <&replicator_in>;
};
};
- port@1 {
- reg = <0>;
+ };
+
+ in-ports {
+ port {
etf_in: endpoint {
- slave-mode;
remote-endpoint = <&merger_out>;
};
};
@@ -860,7 +860,7 @@
clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -873,12 +873,13 @@
port@1 {
reg = <1>;
merger_in1: endpoint {
- slave-mode;
remote-endpoint = <&funnel1_out>;
};
};
- port@8 {
- reg = <0>;
+ };
+
+ out-ports {
+ port {
merger_out: endpoint {
remote-endpoint = <&etf_in>;
};
@@ -893,7 +894,7 @@
clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -910,12 +911,13 @@
port@5 {
reg = <5>;
funnel1_in5: endpoint {
- slave-mode;
remote-endpoint = <&kpss_out>;
};
};
- port@8 {
- reg = <0>;
+ };
+
+ out-ports {
+ port {
funnel1_out: endpoint {
remote-endpoint = <&merger_in1>;
};
@@ -930,40 +932,38 @@
clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
- ports {
+ in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
kpss_in0: endpoint {
- slave-mode;
remote-endpoint = <&etm0_out>;
};
};
port@1 {
reg = <1>;
kpss_in1: endpoint {
- slave-mode;
remote-endpoint = <&etm1_out>;
};
};
port@2 {
reg = <2>;
kpss_in2: endpoint {
- slave-mode;
remote-endpoint = <&etm2_out>;
};
};
port@3 {
reg = <3>;
kpss_in3: endpoint {
- slave-mode;
remote-endpoint = <&etm3_out>;
};
};
- port@8 {
- reg = <0>;
+ };
+
+ out-ports {
+ port {
kpss_out: endpoint {
remote-endpoint = <&funnel1_in5>;
};
@@ -980,9 +980,11 @@
cpu = <&CPU0>;
- port {
- etm0_out: endpoint {
- remote-endpoint = <&kpss_in0>;
+ out-ports {
+ port {
+ etm0_out: endpoint {
+ remote-endpoint = <&kpss_in0>;
+ };
};
};
};
@@ -996,9 +998,11 @@
cpu = <&CPU1>;
- port {
- etm1_out: endpoint {
- remote-endpoint = <&kpss_in1>;
+ out-ports {
+ port {
+ etm1_out: endpoint {
+ remote-endpoint = <&kpss_in1>;
+ };
};
};
};
@@ -1012,9 +1016,11 @@
cpu = <&CPU2>;
- port {
- etm2_out: endpoint {
- remote-endpoint = <&kpss_in2>;
+ out-ports {
+ port {
+ etm2_out: endpoint {
+ remote-endpoint = <&kpss_in2>;
+ };
};
};
};
@@ -1028,9 +1034,11 @@
cpu = <&CPU3>;
- port {
- etm3_out: endpoint {
- remote-endpoint = <&kpss_in3>;
+ out-ports {
+ port {
+ etm3_out: endpoint {
+ remote-endpoint = <&kpss_in3>;
+ };
};
};
};
--
2.19.0
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v2 10/11] arm: dts: sama5d2: Update coresight bindings for hardware ports
2018-09-12 13:53 [PATCH v2 00/11] dts: Update coresight device tree bindings Suzuki K Poulose
` (8 preceding siblings ...)
2018-09-12 13:53 ` [PATCH v2 09/11] arm: dts: qcom: " Suzuki K Poulose
@ 2018-09-12 13:53 ` Suzuki K Poulose
2018-09-19 17:12 ` Alexandre Belloni
2018-09-12 13:53 ` [PATCH v2 11/11] arm: dts: ste-dbx5x0: Update coresight bindings for hardware port Suzuki K Poulose
2018-09-19 23:29 ` [PATCH v2 00/11] dts: Update coresight device tree bindings Mathieu Poirier
11 siblings, 1 reply; 29+ messages in thread
From: Suzuki K Poulose @ 2018-09-12 13:53 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mathieu.poirier, linux-kernel, devicetree, robh, frowand.list,
coresight, leo.yan, suzuki.poulose, Nicolas Ferre,
Alexandre Belloni
Switch to the new coresight bindings for hardware ports
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm/boot/dts/sama5d2.dtsi | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 61f68e5c48e9..f0fd2b1c04ba 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -84,10 +84,11 @@
clocks = <&mck>;
clock-names = "apb_pclk";
- port {
- etb_in: endpoint {
- slave-mode;
- remote-endpoint = <&etm_out>;
+ in-ports {
+ port {
+ etb_in: endpoint {
+ remote-endpoint = <&etm_out>;
+ };
};
};
};
@@ -99,9 +100,11 @@
clocks = <&mck>;
clock-names = "apb_pclk";
- port {
- etm_out: endpoint {
- remote-endpoint = <&etb_in>;
+ out-ports {
+ port {
+ etm_out: endpoint {
+ remote-endpoint = <&etb_in>;
+ };
};
};
};
--
2.19.0
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v2 11/11] arm: dts: ste-dbx5x0: Update coresight bindings for hardware port
2018-09-12 13:53 [PATCH v2 00/11] dts: Update coresight device tree bindings Suzuki K Poulose
` (9 preceding siblings ...)
2018-09-12 13:53 ` [PATCH v2 10/11] arm: dts: sama5d2: " Suzuki K Poulose
@ 2018-09-12 13:53 ` Suzuki K Poulose
2018-09-14 8:43 ` Linus Walleij
2018-09-20 22:02 ` Linus Walleij
2018-09-19 23:29 ` [PATCH v2 00/11] dts: Update coresight device tree bindings Mathieu Poirier
11 siblings, 2 replies; 29+ messages in thread
From: Suzuki K Poulose @ 2018-09-12 13:53 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mathieu.poirier, linux-kernel, devicetree, robh, frowand.list,
coresight, leo.yan, suzuki.poulose, Linus Walleij
Switch to the new coresight bindings
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm/boot/dts/ste-dbx5x0.dtsi | 65 ++++++++++++++++---------------
1 file changed, 33 insertions(+), 32 deletions(-)
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index 2310a4e97768..7f94b5a53205 100644
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -67,9 +67,11 @@
clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
clock-names = "apb_pclk", "atclk";
cpu = <&CPU0>;
- port {
- ptm0_out_port: endpoint {
- remote-endpoint = <&funnel_in_port0>;
+ out-ports {
+ port {
+ ptm0_out_port: endpoint {
+ remote-endpoint = <&funnel_in_port0>;
+ };
};
};
};
@@ -81,9 +83,11 @@
clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
clock-names = "apb_pclk", "atclk";
cpu = <&CPU1>;
- port {
- ptm1_out_port: endpoint {
- remote-endpoint = <&funnel_in_port1>;
+ out-ports {
+ port {
+ ptm1_out_port: endpoint {
+ remote-endpoint = <&funnel_in_port1>;
+ };
};
};
};
@@ -94,32 +98,29 @@
clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
clock-names = "apb_pclk", "atclk";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* funnel output ports */
- port@0 {
- reg = <0>;
+ out-ports {
+ port {
funnel_out_port: endpoint {
remote-endpoint =
<&replicator_in_port0>;
};
};
+ };
- /* funnel input ports */
- port@1 {
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
reg = <0>;
funnel_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&ptm0_out_port>;
};
};
- port@2 {
+ port@1 {
reg = <1>;
funnel_in_port1: endpoint {
- slave-mode;
remote-endpoint = <&ptm1_out_port>;
};
};
@@ -131,11 +132,10 @@
clocks = <&prcmu_clk PRCMU_APEATCLK>;
clock-names = "atclk";
- ports {
+ out-ports {
#address-cells = <1>;
#size-cells = <0>;
- /* replicator output ports */
port@0 {
reg = <0>;
replicator_out_port0: endpoint {
@@ -148,12 +148,11 @@
remote-endpoint = <&etb_in_port>;
};
};
+ };
- /* replicator input port */
- port@2 {
- reg = <0>;
+ in-ports {
+ port {
replicator_in_port0: endpoint {
- slave-mode;
remote-endpoint = <&funnel_out_port>;
};
};
@@ -166,10 +165,11 @@
clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
clock-names = "apb_pclk", "atclk";
- port {
- tpiu_in_port: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out_port0>;
+ in-ports {
+ port {
+ tpiu_in_port: endpoint {
+ remote-endpoint = <&replicator_out_port0>;
+ };
};
};
};
@@ -180,10 +180,11 @@
clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
clock-names = "apb_pclk", "atclk";
- port {
- etb_in_port: endpoint {
- slave-mode;
- remote-endpoint = <&replicator_out_port1>;
+ in-ports {
+ port {
+ etb_in_port: endpoint {
+ remote-endpoint = <&replicator_out_port1>;
+ };
};
};
};
--
2.19.0
^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [PATCH v2 11/11] arm: dts: ste-dbx5x0: Update coresight bindings for hardware port
2018-09-12 13:53 ` [PATCH v2 11/11] arm: dts: ste-dbx5x0: Update coresight bindings for hardware port Suzuki K Poulose
@ 2018-09-14 8:43 ` Linus Walleij
2018-09-14 8:58 ` Suzuki K Poulose
2018-09-20 22:02 ` Linus Walleij
1 sibling, 1 reply; 29+ messages in thread
From: Linus Walleij @ 2018-09-14 8:43 UTC (permalink / raw)
To: Suzuki K. Poulose
Cc: Linux ARM, mathieu poirier, linux-kernel,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Rob Herring, Frank Rowand, coresight, Leo Yan
On Wed, Sep 12, 2018 at 3:54 PM Suzuki K Poulose <suzuki.poulose@arm.com> wrote:
> Switch to the new coresight bindings
>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
I guess you will merge this with the rest of the patches so I do
not need to queue it?
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v2 11/11] arm: dts: ste-dbx5x0: Update coresight bindings for hardware port
2018-09-14 8:43 ` Linus Walleij
@ 2018-09-14 8:58 ` Suzuki K Poulose
0 siblings, 0 replies; 29+ messages in thread
From: Suzuki K Poulose @ 2018-09-14 8:58 UTC (permalink / raw)
To: Linus Walleij
Cc: Linux ARM, mathieu poirier, linux-kernel,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Rob Herring, Frank Rowand, coresight, Leo Yan, arm
Hi Linus,
On 14/09/18 09:43, Linus Walleij wrote:
> On Wed, Sep 12, 2018 at 3:54 PM Suzuki K Poulose <suzuki.poulose@arm.com> wrote:
>
>> Switch to the new coresight bindings
>>
>> Cc: Linus Walleij <linus.walleij@linaro.org>
>> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>
Thanks.
> I guess you will merge this with the rest of the patches so I do
> not need to queue it?
We haven't figured out that yet. I guess it would be ideal if we
could merge this via arm-soc ? To avoid possible conflict with
other changes to the dts in the series. Sudeep has queued the
TC2 and Juno changes. So, if you could queue it, that is fine
with us.
Suzuki
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v2 10/11] arm: dts: sama5d2: Update coresight bindings for hardware ports
2018-09-12 13:53 ` [PATCH v2 10/11] arm: dts: sama5d2: " Suzuki K Poulose
@ 2018-09-19 17:12 ` Alexandre Belloni
0 siblings, 0 replies; 29+ messages in thread
From: Alexandre Belloni @ 2018-09-19 17:12 UTC (permalink / raw)
To: Suzuki K Poulose
Cc: linux-arm-kernel, mathieu.poirier, linux-kernel, devicetree,
robh, frowand.list, coresight, leo.yan, Nicolas Ferre
On 12/09/2018 14:53:51+0100, Suzuki K Poulose wrote:
> Switch to the new coresight bindings for hardware ports
>
> Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> ---
> arch/arm/boot/dts/sama5d2.dtsi | 17 ++++++++++-------
> 1 file changed, 10 insertions(+), 7 deletions(-)
>
Applied, thanks.
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v2 00/11] dts: Update coresight device tree bindings
2018-09-12 13:53 [PATCH v2 00/11] dts: Update coresight device tree bindings Suzuki K Poulose
` (10 preceding siblings ...)
2018-09-12 13:53 ` [PATCH v2 11/11] arm: dts: ste-dbx5x0: Update coresight bindings for hardware port Suzuki K Poulose
@ 2018-09-19 23:29 ` Mathieu Poirier
11 siblings, 0 replies; 29+ messages in thread
From: Mathieu Poirier @ 2018-09-19 23:29 UTC (permalink / raw)
To: Suzuki K. Poulose
Cc: linux-arm-kernel, Linux Kernel Mailing List, devicetree,
Rob Herring, Frank Rowand, coresight, Leo Yan, alexandre.belloni,
Andy Gross, bcousson, David Brown, fabio.estevam, Ivan Ivanov,
Linus Walleij, linux-omap, lipengcheng, Liviu Dudau,
Lorenzo Pieralisi, nicolas.ferre, Orson Zhai, kernel,
Sascha Hauer, Shawn Guo, Sudeep Holla, tony, xuwei, Lyra Zhang,
arm
On Wed, 12 Sep 2018 at 07:54, Suzuki K Poulose <suzuki.poulose@arm.com> wrote:
>
> Coresight DT bindings have been updated to obey the DTS rules
> for label/address matching for graph nodes. The changes are in
> coresight/next tree scheduled for v4.20. This series updates the
> in kernel dts to match the new bindings along with updating a couple
> of new examples (e.,g CATU) in the Documentation (which were missed
> as they were still in flight when we created the series).
>
> Please note that this should not be pulled for v4.19, which I think
> is a safe assumption. But please do pull it for v4.20.
> The dt updates for the Juno boards were sent earlier with the original
> DT update series and has been queued for v4.20.
>
> Applies on coresight/next (which is based on v4.19) and should apply
> cleanly on v4.19-rc3.
>
> Changes since V1:
> - Avoid "avoid_unnecessary_addr_size" warnings by removing
> #address-cells/#size-cells for single port with address 0.
> - Fix TPIU inport for qcom msm8196. (Leo Yan)
> - Fix documentation example for TPIU (Leo Yan)
> - Fix subject tags (as pointed out by Leo and Shawn)
> - Drop patch for TC2, which has been queued by Sudeep
>
>
> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
> Cc: Andy Gross <andy.gross@linaro.org>
> Cc: Benoît Cousson <bcousson@baylibre.com>
> Cc: David Brown <david.brown@linaro.org>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Frank Rowand <frowand.list@gmail.com>
> Cc: Ivan T. Ivanov <ivan.ivanov@linaro.org>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: linux-omap@vger.kernel.org
> Cc: lipengcheng8@huawei.com
> Cc: Liviu Dudau <liviu.dudau@arm.com>
> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
> Cc: orsonzhai@gmail.com
> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: Sudeep Holla <sudeep.holla@arm.com>
> Cc: Tony Lindgren <tony@atomide.com>
> Cc: Wei Xu <xuwei5@hisilicon.com>
> Cc: xuwei5@hisilicon.com
> Cc: zhang.lyra@gmail.com
> Cc: arm@kernel.org
>
>
> Suzuki K Poulose (11):
> coresight: dts: binding: Fix example for TPIU component
> coresight: dts: binding: Update coresight binding examples
> arm64: dts: hi6220: Update coresight bindings for hardware ports
> arm64: dts: sc9836/sc9860: Update coresight bindings for hardware
> ports
> arm64: dts: msm8916: Update coresight bindings for hardware ports
> arm: dts: hip04: Update coresight bindings for hardware ports
> arm: dts: imx7: Update coresight binding for hardware ports
> arm: dts: omap: Update coresight bindings for hardware ports
> arm: dts: qcom: Update coresight bindings for hardware ports
> arm: dts: sama5d2: Update coresight bindings for hardware ports
> arm: dts: ste-dbx5x0: Update coresight bindings for hardware port
>
> .../devicetree/bindings/arm/coresight.txt | 27 +-
> arch/arm/boot/dts/hip04.dtsi | 346 +++++++++---------
> arch/arm/boot/dts/imx7d.dtsi | 14 +-
> arch/arm/boot/dts/imx7s.dtsi | 82 ++---
> arch/arm/boot/dts/omap3-beagle-xm.dts | 17 +-
> arch/arm/boot/dts/omap3-beagle.dts | 17 +-
> arch/arm/boot/dts/qcom-apq8064.dtsi | 71 ++--
> arch/arm/boot/dts/qcom-msm8974.dtsi | 104 +++---
> arch/arm/boot/dts/sama5d2.dtsi | 17 +-
> arch/arm/boot/dts/ste-dbx5x0.dtsi | 65 ++--
> .../boot/dts/hisilicon/hi6220-coresight.dtsi | 181 +++++----
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 95 ++---
> arch/arm64/boot/dts/sprd/sc9836.dtsi | 82 +++--
> arch/arm64/boot/dts/sprd/sc9860.dtsi | 215 +++++------
> 14 files changed, 682 insertions(+), 651 deletions(-)
I have applied patch 1 and 2 in this set.
Thanks,
Mathieu
>
> --
> 2.19.0
>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v2 08/11] arm: dts: omap: Update coresight bindings for hardware ports
2018-09-12 13:53 ` [PATCH v2 08/11] arm: dts: omap: Update coresight bindings " Suzuki K Poulose
@ 2018-09-20 22:01 ` Tony Lindgren
0 siblings, 0 replies; 29+ messages in thread
From: Tony Lindgren @ 2018-09-20 22:01 UTC (permalink / raw)
To: Suzuki K Poulose
Cc: linux-arm-kernel, mathieu.poirier, linux-kernel, devicetree,
robh, frowand.list, coresight, leo.yan, linux-omap,
Benoît Cousson
* Suzuki K Poulose <suzuki.poulose@arm.com> [180912 06:58]:
> Switch to the new coresight bindings for hardware ports
>
> Cc: linux-omap@vger.kernel.org
> Cc: "Benoît Cousson" <bcousson@baylibre.com>
> Cc: Tony Lindgren <tony@atomide.com>
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> ---
> arch/arm/boot/dts/omap3-beagle-xm.dts | 17 ++++++++++-------
> arch/arm/boot/dts/omap3-beagle.dts | 17 ++++++++++-------
> 2 files changed, 20 insertions(+), 14 deletions(-)
Thanks applying this into omap-for-v4.20/dt.
Tony
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v2 11/11] arm: dts: ste-dbx5x0: Update coresight bindings for hardware port
2018-09-12 13:53 ` [PATCH v2 11/11] arm: dts: ste-dbx5x0: Update coresight bindings for hardware port Suzuki K Poulose
2018-09-14 8:43 ` Linus Walleij
@ 2018-09-20 22:02 ` Linus Walleij
2018-09-21 9:24 ` Suzuki K Poulose
1 sibling, 1 reply; 29+ messages in thread
From: Linus Walleij @ 2018-09-20 22:02 UTC (permalink / raw)
To: Suzuki K. Poulose
Cc: Linux ARM, mathieu poirier, linux-kernel,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Rob Herring, Frank Rowand, coresight, Leo Yan
On Wed, Sep 12, 2018 at 6:54 AM Suzuki K Poulose <suzuki.poulose@arm.com> wrote:
> Switch to the new coresight bindings
>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Applied to the ux500 tree.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v2 11/11] arm: dts: ste-dbx5x0: Update coresight bindings for hardware port
2018-09-20 22:02 ` Linus Walleij
@ 2018-09-21 9:24 ` Suzuki K Poulose
0 siblings, 0 replies; 29+ messages in thread
From: Suzuki K Poulose @ 2018-09-21 9:24 UTC (permalink / raw)
To: Linus Walleij
Cc: Linux ARM, mathieu poirier, linux-kernel,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Rob Herring, Frank Rowand, coresight, Leo Yan
Linus,
On 20/09/18 23:02, Linus Walleij wrote:
> On Wed, Sep 12, 2018 at 6:54 AM Suzuki K Poulose <suzuki.poulose@arm.com> wrote:
>
>> Switch to the new coresight bindings
>>
>> Cc: Linus Walleij <linus.walleij@linaro.org>
>> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>
> Applied to the ux500 tree.
Thanks !
Suzuki
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v2 03/11] arm64: dts: hi6220: Update coresight bindings for hardware ports
2018-09-12 13:53 ` [PATCH v2 03/11] arm64: dts: hi6220: Update coresight bindings for hardware ports Suzuki K Poulose
@ 2018-09-21 14:06 ` Wei Xu
0 siblings, 0 replies; 29+ messages in thread
From: Wei Xu @ 2018-09-21 14:06 UTC (permalink / raw)
To: Suzuki K Poulose, linux-arm-kernel
Cc: mathieu.poirier, linux-kernel, devicetree, robh, frowand.list,
coresight, leo.yan, lipengcheng8
Hi Suzuki,
On 2018/9/12 14:53, Suzuki K Poulose wrote:
> Switch to updated coresight bindings for hw ports.
>
> Cc: xuwei5@hisilicon.com
> Cc: lipengcheng8@huawei.com
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Tested-by: Leo Yan <leo.yan@linaro.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Thanks!
Applied to the hisilicon dt tree.
Best Regards,
Wei
> ---
> .../boot/dts/hisilicon/hi6220-coresight.dtsi | 181 +++++++++---------
> 1 file changed, 86 insertions(+), 95 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
> index 7afee5d5087b..68c52f1149be 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
> @@ -20,22 +20,18 @@
> clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
> clock-names = "apb_pclk";
>
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> + out-ports {
> + port {
> soc_funnel_out: endpoint {
> remote-endpoint =
> <&etf_in>;
> };
> };
> + };
>
> - port@1 {
> - reg = <0>;
> + in-ports {
> + port {
> soc_funnel_in: endpoint {
> - slave-mode;
> remote-endpoint =
> <&acpu_funnel_out>;
> };
> @@ -49,21 +45,17 @@
> clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
> clock-names = "apb_pclk";
>
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> + in-ports {
> + port {
> etf_in: endpoint {
> - slave-mode;
> remote-endpoint =
> <&soc_funnel_out>;
> };
> };
> + };
>
> - port@1 {
> - reg = <0>;
> + out-ports {
> + port {
> etf_out: endpoint {
> remote-endpoint =
> <&replicator_in>;
> @@ -77,20 +69,20 @@
> clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
> clock-names = "apb_pclk";
>
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> + in-ports {
> + port {
> replicator_in: endpoint {
> - slave-mode;
> remote-endpoint =
> <&etf_out>;
> };
> };
> + };
>
> - port@1 {
> + out-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> reg = <0>;
> replicator_out0: endpoint {
> remote-endpoint =
> @@ -98,7 +90,7 @@
> };
> };
>
> - port@2 {
> + port@1 {
> reg = <1>;
> replicator_out1: endpoint {
> remote-endpoint =
> @@ -114,14 +106,9 @@
> clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
> clock-names = "apb_pclk";
>
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> + in-ports {
> + port {
> etr_in: endpoint {
> - slave-mode;
> remote-endpoint =
> <&replicator_out0>;
> };
> @@ -135,14 +122,9 @@
> clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
> clock-names = "apb_pclk";
>
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> + in-ports {
> + port {
> tpiu_in: endpoint {
> - slave-mode;
> remote-endpoint =
> <&replicator_out1>;
> };
> @@ -156,85 +138,78 @@
> clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
> clock-names = "apb_pclk";
>
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> + out-ports {
> + port {
> acpu_funnel_out: endpoint {
> remote-endpoint =
> <&soc_funnel_in>;
> };
> };
> + };
>
> - port@1 {
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> reg = <0>;
> acpu_funnel_in0: endpoint {
> - slave-mode;
> remote-endpoint =
> <&etm0_out>;
> };
> };
>
> - port@2 {
> + port@1 {
> reg = <1>;
> acpu_funnel_in1: endpoint {
> - slave-mode;
> remote-endpoint =
> <&etm1_out>;
> };
> };
>
> - port@3 {
> + port@2 {
> reg = <2>;
> acpu_funnel_in2: endpoint {
> - slave-mode;
> remote-endpoint =
> <&etm2_out>;
> };
> };
>
> - port@4 {
> + port@3 {
> reg = <3>;
> acpu_funnel_in3: endpoint {
> - slave-mode;
> remote-endpoint =
> <&etm3_out>;
> };
> };
>
> - port@5 {
> + port@4 {
> reg = <4>;
> acpu_funnel_in4: endpoint {
> - slave-mode;
> remote-endpoint =
> <&etm4_out>;
> };
> };
>
> - port@6 {
> + port@5 {
> reg = <5>;
> acpu_funnel_in5: endpoint {
> - slave-mode;
> remote-endpoint =
> <&etm5_out>;
> };
> };
>
> - port@7 {
> + port@6 {
> reg = <6>;
> acpu_funnel_in6: endpoint {
> - slave-mode;
> remote-endpoint =
> <&etm6_out>;
> };
> };
>
> - port@8 {
> + port@7 {
> reg = <7>;
> acpu_funnel_in7: endpoint {
> - slave-mode;
> remote-endpoint =
> <&etm7_out>;
> };
> @@ -251,10 +226,12 @@
>
> cpu = <&cpu0>;
>
> - port {
> - etm0_out: endpoint {
> - remote-endpoint =
> - <&acpu_funnel_in0>;
> + out-ports {
> + port {
> + etm0_out: endpoint {
> + remote-endpoint =
> + <&acpu_funnel_in0>;
> + };
> };
> };
> };
> @@ -268,10 +245,12 @@
>
> cpu = <&cpu1>;
>
> - port {
> - etm1_out: endpoint {
> - remote-endpoint =
> - <&acpu_funnel_in1>;
> + out-ports {
> + port {
> + etm1_out: endpoint {
> + remote-endpoint =
> + <&acpu_funnel_in1>;
> + };
> };
> };
> };
> @@ -285,10 +264,12 @@
>
> cpu = <&cpu2>;
>
> - port {
> - etm2_out: endpoint {
> - remote-endpoint =
> - <&acpu_funnel_in2>;
> + out-ports {
> + port {
> + etm2_out: endpoint {
> + remote-endpoint =
> + <&acpu_funnel_in2>;
> + };
> };
> };
> };
> @@ -302,10 +283,12 @@
>
> cpu = <&cpu3>;
>
> - port {
> - etm3_out: endpoint {
> - remote-endpoint =
> - <&acpu_funnel_in3>;
> + out-ports {
> + port {
> + etm3_out: endpoint {
> + remote-endpoint =
> + <&acpu_funnel_in3>;
> + };
> };
> };
> };
> @@ -319,10 +302,12 @@
>
> cpu = <&cpu4>;
>
> - port {
> - etm4_out: endpoint {
> - remote-endpoint =
> - <&acpu_funnel_in4>;
> + out-ports {
> + port {
> + etm4_out: endpoint {
> + remote-endpoint =
> + <&acpu_funnel_in4>;
> + };
> };
> };
> };
> @@ -336,10 +321,12 @@
>
> cpu = <&cpu5>;
>
> - port {
> - etm5_out: endpoint {
> - remote-endpoint =
> - <&acpu_funnel_in5>;
> + out-ports {
> + port {
> + etm5_out: endpoint {
> + remote-endpoint =
> + <&acpu_funnel_in5>;
> + };
> };
> };
> };
> @@ -353,10 +340,12 @@
>
> cpu = <&cpu6>;
>
> - port {
> - etm6_out: endpoint {
> - remote-endpoint =
> - <&acpu_funnel_in6>;
> + out-ports {
> + port {
> + etm6_out: endpoint {
> + remote-endpoint =
> + <&acpu_funnel_in6>;
> + };
> };
> };
> };
> @@ -370,10 +359,12 @@
>
> cpu = <&cpu7>;
>
> - port {
> - etm7_out: endpoint {
> - remote-endpoint =
> - <&acpu_funnel_in7>;
> + out-ports {
> + port {
> + etm7_out: endpoint {
> + remote-endpoint =
> + <&acpu_funnel_in7>;
> + };
> };
> };
> };
>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v2 06/11] arm: dts: hip04: Update coresight bindings for hardware ports
2018-09-12 13:53 ` [PATCH v2 06/11] arm: dts: hip04: " Suzuki K Poulose
@ 2018-09-21 14:06 ` Wei Xu
0 siblings, 0 replies; 29+ messages in thread
From: Wei Xu @ 2018-09-21 14:06 UTC (permalink / raw)
To: Suzuki K Poulose, linux-arm-kernel
Cc: mathieu.poirier, linux-kernel, devicetree, robh, frowand.list,
coresight, leo.yan
Hi Suzuki,
On 2018/9/12 14:53, Suzuki K Poulose wrote:
> Switch to the new the hardware port bindings.
>
> Cc: Wei Xu <xuwei5@hisilicon.com>
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Thanks!
Applied to the hisilicon dt tree.
Best Regards,
Wei
> ---
> arch/arm/boot/dts/hip04.dtsi | 346 ++++++++++++++++++-----------------
> 1 file changed, 176 insertions(+), 170 deletions(-)
>
> diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi
> index 44044f275115..0f917b272ff3 100644
> --- a/arch/arm/boot/dts/hip04.dtsi
> +++ b/arch/arm/boot/dts/hip04.dtsi
> @@ -277,10 +277,11 @@
>
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> - port {
> - etb0_in_port: endpoint@0 {
> - slave-mode;
> - remote-endpoint = <&replicator0_out_port0>;
> + in-ports {
> + port {
> + etb0_in_port: endpoint@0 {
> + remote-endpoint = <&replicator0_out_port0>;
> + };
> };
> };
> };
> @@ -291,10 +292,11 @@
>
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> - port {
> - etb1_in_port: endpoint@0 {
> - slave-mode;
> - remote-endpoint = <&replicator1_out_port0>;
> + in-ports {
> + port {
> + etb1_in_port: endpoint@0 {
> + remote-endpoint = <&replicator1_out_port0>;
> + };
> };
> };
> };
> @@ -305,10 +307,11 @@
>
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> - port {
> - etb2_in_port: endpoint@0 {
> - slave-mode;
> - remote-endpoint = <&replicator2_out_port0>;
> + in-ports {
> + port {
> + etb2_in_port: endpoint@0 {
> + remote-endpoint = <&replicator2_out_port0>;
> + };
> };
> };
> };
> @@ -319,10 +322,11 @@
>
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> - port {
> - etb3_in_port: endpoint@0 {
> - slave-mode;
> - remote-endpoint = <&replicator3_out_port0>;
> + in-ports {
> + port {
> + etb3_in_port: endpoint@0 {
> + remote-endpoint = <&replicator3_out_port0>;
> + };
> };
> };
> };
> @@ -333,10 +337,11 @@
>
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> - port {
> - tpiu_in_port: endpoint@0 {
> - slave-mode;
> - remote-endpoint = <&funnel4_out_port0>;
> + in-ports {
> + port {
> + tpiu_in_port: endpoint@0 {
> + remote-endpoint = <&funnel4_out_port0>;
> + };
> };
> };
> };
> @@ -347,7 +352,7 @@
> */
> compatible = "arm,coresight-replicator";
>
> - ports {
> + out-ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> @@ -365,12 +370,11 @@
> remote-endpoint = <&funnel4_in_port0>;
> };
> };
> + };
>
> - /* replicator input port */
> - port@2 {
> - reg = <0>;
> + in-ports {
> + port {
> replicator0_in_port0: endpoint {
> - slave-mode;
> remote-endpoint = <&funnel0_out_port0>;
> };
> };
> @@ -383,7 +387,7 @@
> */
> compatible = "arm,coresight-replicator";
>
> - ports {
> + out-ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> @@ -401,12 +405,11 @@
> remote-endpoint = <&funnel4_in_port1>;
> };
> };
> + };
>
> - /* replicator input port */
> - port@2 {
> - reg = <0>;
> + in-ports {
> + port {
> replicator1_in_port0: endpoint {
> - slave-mode;
> remote-endpoint = <&funnel1_out_port0>;
> };
> };
> @@ -419,11 +422,10 @@
> */
> compatible = "arm,coresight-replicator";
>
> - ports {
> + out-ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> - /* replicator output ports */
> port@0 {
> reg = <0>;
> replicator2_out_port0: endpoint {
> @@ -437,12 +439,11 @@
> remote-endpoint = <&funnel4_in_port2>;
> };
> };
> + };
>
> - /* replicator input port */
> - port@2 {
> - reg = <0>;
> + in-ports {
> + port {
> replicator2_in_port0: endpoint {
> - slave-mode;
> remote-endpoint = <&funnel2_out_port0>;
> };
> };
> @@ -455,11 +456,10 @@
> */
> compatible = "arm,coresight-replicator";
>
> - ports {
> + out-ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> - /* replicator output ports */
> port@0 {
> reg = <0>;
> replicator3_out_port0: endpoint {
> @@ -473,12 +473,11 @@
> remote-endpoint = <&funnel4_in_port3>;
> };
> };
> + };
>
> - /* replicator input port */
> - port@2 {
> - reg = <0>;
> + in-ports {
> + port {
> replicator3_in_port0: endpoint {
> - slave-mode;
> remote-endpoint = <&funnel3_out_port0>;
> };
> };
> @@ -491,48 +490,43 @@
>
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - /* funnel output port */
> - port@0 {
> - reg = <0>;
> + out-ports {
> + port {
> funnel0_out_port0: endpoint {
> remote-endpoint =
> <&replicator0_in_port0>;
> };
> };
> + };
>
> - /* funnel input ports */
> - port@1 {
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> reg = <0>;
> funnel0_in_port0: endpoint {
> - slave-mode;
> remote-endpoint = <&ptm0_out_port>;
> };
> };
>
> - port@2 {
> + port@1 {
> reg = <1>;
> funnel0_in_port1: endpoint {
> - slave-mode;
> remote-endpoint = <&ptm1_out_port>;
> };
> };
>
> - port@3 {
> + port@2 {
> reg = <2>;
> funnel0_in_port2: endpoint {
> - slave-mode;
> remote-endpoint = <&ptm2_out_port>;
> };
> };
>
> - port@4 {
> + port@3 {
> reg = <3>;
> funnel0_in_port3: endpoint {
> - slave-mode;
> remote-endpoint = <&ptm3_out_port>;
> };
> };
> @@ -545,48 +539,43 @@
>
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - /* funnel output port */
> - port@0 {
> - reg = <0>;
> + out-ports {
> + port {
> funnel1_out_port0: endpoint {
> remote-endpoint =
> <&replicator1_in_port0>;
> };
> };
> + };
>
> - /* funnel input ports */
> - port@1 {
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> reg = <0>;
> funnel1_in_port0: endpoint {
> - slave-mode;
> remote-endpoint = <&ptm4_out_port>;
> };
> };
>
> - port@2 {
> + port@1 {
> reg = <1>;
> funnel1_in_port1: endpoint {
> - slave-mode;
> remote-endpoint = <&ptm5_out_port>;
> };
> };
>
> - port@3 {
> + port@2 {
> reg = <2>;
> funnel1_in_port2: endpoint {
> - slave-mode;
> remote-endpoint = <&ptm6_out_port>;
> };
> };
>
> - port@4 {
> + port@3 {
> reg = <3>;
> funnel1_in_port3: endpoint {
> - slave-mode;
> remote-endpoint = <&ptm7_out_port>;
> };
> };
> @@ -599,48 +588,43 @@
>
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - /* funnel output port */
> - port@0 {
> - reg = <0>;
> + out-ports {
> + port {
> funnel2_out_port0: endpoint {
> remote-endpoint =
> <&replicator2_in_port0>;
> };
> };
> + };
>
> - /* funnel input ports */
> - port@1 {
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> reg = <0>;
> funnel2_in_port0: endpoint {
> - slave-mode;
> remote-endpoint = <&ptm8_out_port>;
> };
> };
>
> - port@2 {
> + port@1 {
> reg = <1>;
> funnel2_in_port1: endpoint {
> - slave-mode;
> remote-endpoint = <&ptm9_out_port>;
> };
> };
>
> - port@3 {
> + port@2 {
> reg = <2>;
> funnel2_in_port2: endpoint {
> - slave-mode;
> remote-endpoint = <&ptm10_out_port>;
> };
> };
>
> - port@4 {
> + port@3 {
> reg = <3>;
> funnel2_in_port3: endpoint {
> - slave-mode;
> remote-endpoint = <&ptm11_out_port>;
> };
> };
> @@ -653,48 +637,43 @@
>
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - /* funnel output port */
> - port@0 {
> - reg = <0>;
> + out-ports {
> + port {
> funnel3_out_port0: endpoint {
> remote-endpoint =
> <&replicator3_in_port0>;
> };
> };
> + };
>
> - /* funnel input ports */
> - port@1 {
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> reg = <0>;
> funnel3_in_port0: endpoint {
> - slave-mode;
> remote-endpoint = <&ptm12_out_port>;
> };
> };
>
> - port@2 {
> + port@1 {
> reg = <1>;
> funnel3_in_port1: endpoint {
> - slave-mode;
> remote-endpoint = <&ptm13_out_port>;
> };
> };
>
> - port@3 {
> + port@2 {
> reg = <2>;
> funnel3_in_port2: endpoint {
> - slave-mode;
> remote-endpoint = <&ptm14_out_port>;
> };
> };
>
> - port@4 {
> + port@3 {
> reg = <3>;
> funnel3_in_port3: endpoint {
> - slave-mode;
> remote-endpoint = <&ptm15_out_port>;
> };
> };
> @@ -707,50 +686,45 @@
>
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - /* funnel output port */
> - port@0 {
> - reg = <0>;
> + out-ports {
> + port {
> funnel4_out_port0: endpoint {
> remote-endpoint = <&tpiu_in_port>;
> };
> };
> + };
>
> - /* funnel input ports */
> - port@1 {
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> reg = <0>;
> funnel4_in_port0: endpoint {
> - slave-mode;
> remote-endpoint =
> <&replicator0_out_port1>;
> };
> };
>
> - port@2 {
> + port@1 {
> reg = <1>;
> funnel4_in_port1: endpoint {
> - slave-mode;
> remote-endpoint =
> <&replicator1_out_port1>;
> };
> };
>
> - port@3 {
> + port@2 {
> reg = <2>;
> funnel4_in_port2: endpoint {
> - slave-mode;
> remote-endpoint =
> <&replicator2_out_port1>;
> };
> };
>
> - port@4 {
> + port@3 {
> reg = <3>;
> funnel4_in_port3: endpoint {
> - slave-mode;
> remote-endpoint =
> <&replicator3_out_port1>;
> };
> @@ -765,9 +739,11 @@
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> cpu = <&CPU0>;
> - port {
> - ptm0_out_port: endpoint {
> - remote-endpoint = <&funnel0_in_port0>;
> + out-ports {
> + port {
> + ptm0_out_port: endpoint {
> + remote-endpoint = <&funnel0_in_port0>;
> + };
> };
> };
> };
> @@ -779,9 +755,11 @@
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> cpu = <&CPU1>;
> - port {
> - ptm1_out_port: endpoint {
> - remote-endpoint = <&funnel0_in_port1>;
> + out-ports {
> + port {
> + ptm1_out_port: endpoint {
> + remote-endpoint = <&funnel0_in_port1>;
> + };
> };
> };
> };
> @@ -793,9 +771,11 @@
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> cpu = <&CPU2>;
> - port {
> - ptm2_out_port: endpoint {
> - remote-endpoint = <&funnel0_in_port2>;
> + out-ports {
> + port {
> + ptm2_out_port: endpoint {
> + remote-endpoint = <&funnel0_in_port2>;
> + };
> };
> };
> };
> @@ -807,9 +787,11 @@
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> cpu = <&CPU3>;
> - port {
> - ptm3_out_port: endpoint {
> - remote-endpoint = <&funnel0_in_port3>;
> + out-ports {
> + port {
> + ptm3_out_port: endpoint {
> + remote-endpoint = <&funnel0_in_port3>;
> + };
> };
> };
> };
> @@ -821,9 +803,11 @@
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> cpu = <&CPU4>;
> - port {
> - ptm4_out_port: endpoint {
> - remote-endpoint = <&funnel1_in_port0>;
> + out-ports {
> + port {
> + ptm4_out_port: endpoint {
> + remote-endpoint = <&funnel1_in_port0>;
> + };
> };
> };
> };
> @@ -835,9 +819,11 @@
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> cpu = <&CPU5>;
> - port {
> - ptm5_out_port: endpoint {
> - remote-endpoint = <&funnel1_in_port1>;
> + out-ports {
> + port {
> + ptm5_out_port: endpoint {
> + remote-endpoint = <&funnel1_in_port1>;
> + };
> };
> };
> };
> @@ -849,9 +835,11 @@
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> cpu = <&CPU6>;
> - port {
> - ptm6_out_port: endpoint {
> - remote-endpoint = <&funnel1_in_port2>;
> + out-ports {
> + port {
> + ptm6_out_port: endpoint {
> + remote-endpoint = <&funnel1_in_port2>;
> + };
> };
> };
> };
> @@ -863,9 +851,11 @@
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> cpu = <&CPU7>;
> - port {
> - ptm7_out_port: endpoint {
> - remote-endpoint = <&funnel1_in_port3>;
> + out-ports {
> + port {
> + ptm7_out_port: endpoint {
> + remote-endpoint = <&funnel1_in_port3>;
> + };
> };
> };
> };
> @@ -877,9 +867,11 @@
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> cpu = <&CPU8>;
> - port {
> - ptm8_out_port: endpoint {
> - remote-endpoint = <&funnel2_in_port0>;
> + out-ports {
> + port {
> + ptm8_out_port: endpoint {
> + remote-endpoint = <&funnel2_in_port0>;
> + };
> };
> };
> };
> @@ -890,9 +882,11 @@
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> cpu = <&CPU9>;
> - port {
> - ptm9_out_port: endpoint {
> - remote-endpoint = <&funnel2_in_port1>;
> + out-ports {
> + port {
> + ptm9_out_port: endpoint {
> + remote-endpoint = <&funnel2_in_port1>;
> + };
> };
> };
> };
> @@ -904,9 +898,11 @@
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> cpu = <&CPU10>;
> - port {
> - ptm10_out_port: endpoint {
> - remote-endpoint = <&funnel2_in_port2>;
> + out-ports {
> + port {
> + ptm10_out_port: endpoint {
> + remote-endpoint = <&funnel2_in_port2>;
> + };
> };
> };
> };
> @@ -918,9 +914,11 @@
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> cpu = <&CPU11>;
> - port {
> - ptm11_out_port: endpoint {
> - remote-endpoint = <&funnel2_in_port3>;
> + out-ports {
> + port {
> + ptm11_out_port: endpoint {
> + remote-endpoint = <&funnel2_in_port3>;
> + };
> };
> };
> };
> @@ -932,9 +930,11 @@
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> cpu = <&CPU12>;
> - port {
> - ptm12_out_port: endpoint {
> - remote-endpoint = <&funnel3_in_port0>;
> + out-ports {
> + port {
> + ptm12_out_port: endpoint {
> + remote-endpoint = <&funnel3_in_port0>;
> + };
> };
> };
> };
> @@ -946,9 +946,11 @@
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> cpu = <&CPU13>;
> - port {
> - ptm13_out_port: endpoint {
> - remote-endpoint = <&funnel3_in_port1>;
> + out-ports {
> + port {
> + ptm13_out_port: endpoint {
> + remote-endpoint = <&funnel3_in_port1>;
> + };
> };
> };
> };
> @@ -960,9 +962,11 @@
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> cpu = <&CPU14>;
> - port {
> - ptm14_out_port: endpoint {
> - remote-endpoint = <&funnel3_in_port2>;
> + out-ports {
> + port {
> + ptm14_out_port: endpoint {
> + remote-endpoint = <&funnel3_in_port2>;
> + };
> };
> };
> };
> @@ -974,9 +978,11 @@
> clocks = <&clk_375m>;
> clock-names = "apb_pclk";
> cpu = <&CPU15>;
> - port {
> - ptm15_out_port: endpoint {
> - remote-endpoint = <&funnel3_in_port3>;
> + out-ports {
> + port {
> + ptm15_out_port: endpoint {
> + remote-endpoint = <&funnel3_in_port3>;
> + };
> };
> };
> };
>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v2 07/11] arm: dts: imx7: Update coresight binding for hardware ports
2018-09-12 13:53 ` [PATCH v2 07/11] arm: dts: imx7: Update coresight binding " Suzuki K Poulose
@ 2018-09-26 2:24 ` Shawn Guo
0 siblings, 0 replies; 29+ messages in thread
From: Shawn Guo @ 2018-09-26 2:24 UTC (permalink / raw)
To: Suzuki K Poulose
Cc: linux-arm-kernel, mathieu.poirier, linux-kernel, devicetree,
robh, frowand.list, coresight, leo.yan, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam
On Wed, Sep 12, 2018 at 02:53:48PM +0100, Suzuki K Poulose wrote:
> Switch to the updated coresight bindings.
>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Applied, thanks.
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v2 01/11] coresight: dts: binding: Fix example for TPIU component
2018-09-12 13:53 ` [PATCH v2 01/11] coresight: dts: binding: Fix example for TPIU component Suzuki K Poulose
@ 2018-09-26 20:30 ` Rob Herring
0 siblings, 0 replies; 29+ messages in thread
From: Rob Herring @ 2018-09-26 20:30 UTC (permalink / raw)
To: Suzuki K Poulose
Cc: linux-arm-kernel, mathieu.poirier, linux-kernel, devicetree,
robh, frowand.list, coresight, leo.yan, suzuki.poulose
On Wed, 12 Sep 2018 14:53:42 +0100, Suzuki K Poulose wrote:
> TPIU component has an input port. The example uses out-ports
> which is wrong. Let us fix it.
>
> Reported-by: Leo Yan <leo.yan@linaro.org>
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> ---
> Documentation/devicetree/bindings/arm/coresight.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v2 05/11] arm64: dts: msm8916: Update coresight bindings for hardware ports
2018-09-12 13:53 ` [PATCH v2 05/11] arm64: dts: msm8916: " Suzuki K Poulose
@ 2018-09-27 8:18 ` Suzuki K Poulose
2018-09-30 17:12 ` Andy Gross
0 siblings, 1 reply; 29+ messages in thread
From: Suzuki K Poulose @ 2018-09-27 8:18 UTC (permalink / raw)
To: linux-arm-kernel, Andy Gross
Cc: Mathieu Poirier, Linux Kernel Mailing List, devicetree, robh,
frowand.list, coresight, leo.yan, David Brown, Ivan T . Ivanov
Hi Andy
On 09/12/2018 02:53 PM, Suzuki K Poulose wrote:
> Switch to updated coresight bindings for hw ports
>
> Cc: Andy Gross <andy.gross@linaro.org>
> Cc: David Brown <david.brown@linaro.org>
> Cc: Ivan T. Ivanov <ivan.ivanov@linaro.org>
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> ---
> Changes since v1:
> - Fixed TPIU port direction
> - Use better subject tag for the patch
> ---
Please could you pull this and the patch for ARM (Patch 9/11) ?
Suzuki
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 95 ++++++++++++++-------------
> 1 file changed, 51 insertions(+), 44 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index 7b32b8990d62..fe375a9c218e 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -1099,10 +1099,11 @@
> clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> clock-names = "apb_pclk", "atclk";
>
> - port {
> - tpiu_in: endpoint {
> - slave-mode;
> - remote-endpoint = <&replicator_out1>;
> + in-ports {
> + port {
> + tpiu_in: endpoint {
> + remote-endpoint = <&replicator_out1>;
> + };
> };
> };
> };
> @@ -1114,7 +1115,7 @@
> clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> clock-names = "apb_pclk", "atclk";
>
> - ports {
> + in-ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> @@ -1132,12 +1133,13 @@
> port@4 {
> reg = <4>;
> funnel0_in4: endpoint {
> - slave-mode;
> remote-endpoint = <&funnel1_out>;
> };
> };
> - port@8 {
> - reg = <0>;
> + };
> +
> + out-ports {
> + port {
> funnel0_out: endpoint {
> remote-endpoint = <&etf_in>;
> };
> @@ -1152,7 +1154,7 @@
> clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> clock-names = "apb_pclk", "atclk";
>
> - ports {
> + out-ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> @@ -1168,10 +1170,11 @@
> remote-endpoint = <&tpiu_in>;
> };
> };
> - port@2 {
> - reg = <0>;
> + };
> +
> + in-ports {
> + port {
> replicator_in: endpoint {
> - slave-mode;
> remote-endpoint = <&etf_out>;
> };
> };
> @@ -1185,19 +1188,16 @@
> clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> clock-names = "apb_pclk", "atclk";
>
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> + in-ports {
> + port {
> etf_in: endpoint {
> - slave-mode;
> remote-endpoint = <&funnel0_out>;
> };
> };
> - port@1 {
> - reg = <0>;
> + };
> +
> + out-ports {
> + port {
> etf_out: endpoint {
> remote-endpoint = <&replicator_in>;
> };
> @@ -1212,10 +1212,11 @@
> clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> clock-names = "apb_pclk", "atclk";
>
> - port {
> - etr_in: endpoint {
> - slave-mode;
> - remote-endpoint = <&replicator_out0>;
> + in-ports {
> + port {
> + etr_in: endpoint {
> + remote-endpoint = <&replicator_out0>;
> + };
> };
> };
> };
> @@ -1227,40 +1228,38 @@
> clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
> clock-names = "apb_pclk", "atclk";
>
> - ports {
> + in-ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> port@0 {
> reg = <0>;
> funnel1_in0: endpoint {
> - slave-mode;
> remote-endpoint = <&etm0_out>;
> };
> };
> port@1 {
> reg = <1>;
> funnel1_in1: endpoint {
> - slave-mode;
> remote-endpoint = <&etm1_out>;
> };
> };
> port@2 {
> reg = <2>;
> funnel1_in2: endpoint {
> - slave-mode;
> remote-endpoint = <&etm2_out>;
> };
> };
> port@3 {
> reg = <3>;
> funnel1_in3: endpoint {
> - slave-mode;
> remote-endpoint = <&etm3_out>;
> };
> };
> - port@4 {
> - reg = <0>;
> + };
> +
> + out-ports {
> + port {
> funnel1_out: endpoint {
> remote-endpoint = <&funnel0_in4>;
> };
> @@ -1309,9 +1308,11 @@
>
> cpu = <&CPU0>;
>
> - port {
> - etm0_out: endpoint {
> - remote-endpoint = <&funnel1_in0>;
> + out-ports {
> + port {
> + etm0_out: endpoint {
> + remote-endpoint = <&funnel1_in0>;
> + };
> };
> };
> };
> @@ -1325,9 +1326,11 @@
>
> cpu = <&CPU1>;
>
> - port {
> - etm1_out: endpoint {
> - remote-endpoint = <&funnel1_in1>;
> + out-ports {
> + port {
> + etm1_out: endpoint {
> + remote-endpoint = <&funnel1_in1>;
> + };
> };
> };
> };
> @@ -1341,9 +1344,11 @@
>
> cpu = <&CPU2>;
>
> - port {
> - etm2_out: endpoint {
> - remote-endpoint = <&funnel1_in2>;
> + out-ports {
> + port {
> + etm2_out: endpoint {
> + remote-endpoint = <&funnel1_in2>;
> + };
> };
> };
> };
> @@ -1357,9 +1362,11 @@
>
> cpu = <&CPU3>;
>
> - port {
> - etm3_out: endpoint {
> - remote-endpoint = <&funnel1_in3>;
> + out-ports {
> + port {
> + etm3_out: endpoint {
> + remote-endpoint = <&funnel1_in3>;
> + };
> };
> };
> };
>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v2 04/11] arm64: dts: sc9836/sc9860: Update coresight bindings for hardware ports
2018-09-12 13:53 ` [PATCH v2 04/11] arm64: dts: sc9836/sc9860: " Suzuki K Poulose
@ 2018-09-27 8:51 ` Suzuki K Poulose
2018-09-27 9:18 ` Chunyan Zhang
0 siblings, 1 reply; 29+ messages in thread
From: Suzuki K Poulose @ 2018-09-27 8:51 UTC (permalink / raw)
To: linux-arm-kernel, Chunyan Zhang
Cc: mathieu.poirier, linux-kernel, devicetree, robh, frowand.list,
coresight, leo.yan, orsonzhai, zhang.lyra
+To: Chunyan Zhang
Chunyan Zhang,
On 09/12/2018 02:53 PM, Suzuki K Poulose wrote:
> Switch to the new coresight bindings for hw ports
>
How can we push this patch ? Do you generally send the spreadtrum
specific changes to ARM soc folks ? Or would you like me to post
this directly to ARM soc folks ?
Suzuki
> Cc: orsonzhai@gmail.com
> Cc: zhang.lyra@gmail.com
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> ---
> arch/arm64/boot/dts/sprd/sc9836.dtsi | 82 +++++-----
> arch/arm64/boot/dts/sprd/sc9860.dtsi | 215 ++++++++++++++-------------
> 2 files changed, 153 insertions(+), 144 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/sprd/sc9836.dtsi b/arch/arm64/boot/dts/sprd/sc9836.dtsi
> index 63894c456969..4bcdbb709c01 100644
> --- a/arch/arm64/boot/dts/sprd/sc9836.dtsi
> +++ b/arch/arm64/boot/dts/sprd/sc9836.dtsi
> @@ -50,10 +50,11 @@
> reg = <0 0x10003000 0 0x1000>;
> clocks = <&clk26mhz>;
> clock-names = "apb_pclk";
> - port {
> - etf_in: endpoint {
> - slave-mode;
> - remote-endpoint = <&funnel_out_port0>;
> + in-ports {
> + port {
> + etf_in: endpoint {
> + remote-endpoint = <&funnel_out_port0>;
> + };
> };
> };
> };
> @@ -63,55 +64,50 @@
> reg = <0 0x10001000 0 0x1000>;
> clocks = <&clk26mhz>;
> clock-names = "apb_pclk";
> - ports {
> +
> + out-ports {
> + port {
> + funnel_out_port0: endpoint {
> + remote-endpoint = <&etf_in>;
> + };
> + };
> + };
> +
> + in-ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> - /* funnel output port */
> port@0 {
> - reg = <0>;
> - funnel_out_port0: endpoint {
> - remote-endpoint = <&etf_in>;
> - };
> - };
> -
> - /* funnel input port 0-4 */
> - port@1 {
> reg = <0>;
> funnel_in_port0: endpoint {
> - slave-mode;
> remote-endpoint = <&etm0_out>;
> };
> };
>
> - port@2 {
> + port@1 {
> reg = <1>;
> funnel_in_port1: endpoint {
> - slave-mode;
> remote-endpoint = <&etm1_out>;
> };
> };
>
> - port@3 {
> + port@2 {
> reg = <2>;
> funnel_in_port2: endpoint {
> - slave-mode;
> remote-endpoint = <&etm2_out>;
> };
> };
>
> - port@4 {
> + port@3 {
> reg = <3>;
> funnel_in_port3: endpoint {
> - slave-mode;
> remote-endpoint = <&etm3_out>;
> };
> };
>
> - port@5 {
> + port@4 {
> reg = <4>;
> funnel_in_port4: endpoint {
> - slave-mode;
> remote-endpoint = <&stm_out>;
> };
> };
> @@ -126,9 +122,11 @@
> cpu = <&cpu0>;
> clocks = <&clk26mhz>;
> clock-names = "apb_pclk";
> - port {
> - etm0_out: endpoint {
> - remote-endpoint = <&funnel_in_port0>;
> + out-ports {
> + port {
> + etm0_out: endpoint {
> + remote-endpoint = <&funnel_in_port0>;
> + };
> };
> };
> };
> @@ -140,9 +138,11 @@
> cpu = <&cpu1>;
> clocks = <&clk26mhz>;
> clock-names = "apb_pclk";
> - port {
> - etm1_out: endpoint {
> - remote-endpoint = <&funnel_in_port1>;
> + out-ports {
> + port {
> + etm1_out: endpoint {
> + remote-endpoint = <&funnel_in_port1>;
> + };
> };
> };
> };
> @@ -154,9 +154,11 @@
> cpu = <&cpu2>;
> clocks = <&clk26mhz>;
> clock-names = "apb_pclk";
> - port {
> - etm2_out: endpoint {
> - remote-endpoint = <&funnel_in_port2>;
> + out-ports {
> + port {
> + etm2_out: endpoint {
> + remote-endpoint = <&funnel_in_port2>;
> + };
> };
> };
> };
> @@ -168,9 +170,11 @@
> cpu = <&cpu3>;
> clocks = <&clk26mhz>;
> clock-names = "apb_pclk";
> - port {
> - etm3_out: endpoint {
> - remote-endpoint = <&funnel_in_port3>;
> + out-ports {
> + port {
> + etm3_out: endpoint {
> + remote-endpoint = <&funnel_in_port3>;
> + };
> };
> };
> };
> @@ -182,9 +186,11 @@
> reg-names = "stm-base", "stm-stimulus-base";
> clocks = <&clk26mhz>;
> clock-names = "apb_pclk";
> - port {
> - stm_out: endpoint {
> - remote-endpoint = <&funnel_in_port4>;
> + out-ports {
> + port {
> + stm_out: endpoint {
> + remote-endpoint = <&funnel_in_port4>;
> + };
> };
> };
> };
> diff --git a/arch/arm64/boot/dts/sprd/sc9860.dtsi b/arch/arm64/boot/dts/sprd/sc9860.dtsi
> index 48f5928ed45c..5f57bf055cde 100644
> --- a/arch/arm64/boot/dts/sprd/sc9860.dtsi
> +++ b/arch/arm64/boot/dts/sprd/sc9860.dtsi
> @@ -304,30 +304,29 @@
> reg = <0 0x10001000 0 0x1000>;
> clocks = <&ext_26m>;
> clock-names = "apb_pclk";
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> + out-ports {
> + port {
> soc_funnel_out_port: endpoint {
> remote-endpoint = <&etb_in>;
> };
> };
> + };
>
> - port@1 {
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> reg = <0>;
> soc_funnel_in_port0: endpoint {
> - slave-mode;
> remote-endpoint =
> <&main_funnel_out_port>;
> };
> };
>
> - port@2 {
> + port@4 {
> reg = <4>;
> soc_funnel_in_port1: endpoint {
> - slave-mode;
> remote-endpoint =
> <&stm_out_port>;
> };
> @@ -340,11 +339,12 @@
> reg = <0 0x10003000 0 0x1000>;
> clocks = <&ext_26m>;
> clock-names = "apb_pclk";
> - port {
> - etb_in: endpoint {
> - slave-mode;
> - remote-endpoint =
> - <&soc_funnel_out_port>;
> + out-ports {
> + port {
> + etb_in: endpoint {
> + remote-endpoint =
> + <&soc_funnel_out_port>;
> + };
> };
> };
> };
> @@ -356,10 +356,12 @@
> reg-names = "stm-base", "stm-stimulus-base";
> clocks = <&ext_26m>;
> clock-names = "apb_pclk";
> - port {
> - stm_out_port: endpoint {
> - remote-endpoint =
> - <&soc_funnel_in_port1>;
> + out-ports {
> + port {
> + stm_out_port: endpoint {
> + remote-endpoint =
> + <&soc_funnel_in_port1>;
> + };
> };
> };
> };
> @@ -369,38 +371,36 @@
> reg = <0 0x11001000 0 0x1000>;
> clocks = <&ext_26m>;
> clock-names = "apb_pclk";
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> + out-ports {
> + port {
> cluster0_funnel_out_port: endpoint {
> remote-endpoint =
> <&cluster0_etf_in>;
> };
> };
> + };
>
> - port@1 {
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> reg = <0>;
> cluster0_funnel_in_port0: endpoint {
> - slave-mode;
> remote-endpoint = <&etm0_out>;
> };
> };
>
> - port@2 {
> + port@1 {
> reg = <1>;
> cluster0_funnel_in_port1: endpoint {
> - slave-mode;
> remote-endpoint = <&etm1_out>;
> };
> };
>
> - port@3 {
> + port@2 {
> reg = <2>;
> cluster0_funnel_in_port2: endpoint {
> - slave-mode;
> remote-endpoint = <&etm2_out>;
> };
> };
> @@ -408,7 +408,6 @@
> port@4 {
> reg = <4>;
> cluster0_funnel_in_port3: endpoint {
> - slave-mode;
> remote-endpoint = <&etm3_out>;
> };
> };
> @@ -420,46 +419,43 @@
> reg = <0 0x11002000 0 0x1000>;
> clocks = <&ext_26m>;
> clock-names = "apb_pclk";
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> + out-ports {
> + port {
> cluster1_funnel_out_port: endpoint {
> remote-endpoint =
> <&cluster1_etf_in>;
> };
> };
> + };
>
> - port@1 {
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> reg = <0>;
> cluster1_funnel_in_port0: endpoint {
> - slave-mode;
> remote-endpoint = <&etm4_out>;
> };
> };
>
> - port@2 {
> + port@1 {
> reg = <1>;
> cluster1_funnel_in_port1: endpoint {
> - slave-mode;
> remote-endpoint = <&etm5_out>;
> };
> };
>
> - port@3 {
> + port@2 {
> reg = <2>;
> cluster1_funnel_in_port2: endpoint {
> - slave-mode;
> remote-endpoint = <&etm6_out>;
> };
> };
>
> - port@4 {
> + port@3 {
> reg = <3>;
> cluster1_funnel_in_port3: endpoint {
> - slave-mode;
> remote-endpoint = <&etm7_out>;
> };
> };
> @@ -472,22 +468,18 @@
> clocks = <&ext_26m>;
> clock-names = "apb_pclk";
>
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> + out-ports {
> + port {
> cluster0_etf_out: endpoint {
> remote-endpoint =
> <&main_funnel_in_port0>;
> };
> };
> + };
>
> - port@1 {
> - reg = <0>;
> + in-ports {
> + port {
> cluster0_etf_in: endpoint {
> - slave-mode;
> remote-endpoint =
> <&cluster0_funnel_out_port>;
> };
> @@ -501,22 +493,18 @@
> clocks = <&ext_26m>;
> clock-names = "apb_pclk";
>
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> + out-ports {
> + port {
> cluster1_etf_out: endpoint {
> remote-endpoint =
> <&main_funnel_in_port1>;
> };
> };
> + };
>
> - port@1 {
> - reg = <0>;
> + in-ports {
> + port {
> cluster1_etf_in: endpoint {
> - slave-mode;
> remote-endpoint =
> <&cluster1_funnel_out_port>;
> };
> @@ -530,31 +518,30 @@
> clocks = <&ext_26m>;
> clock-names = "apb_pclk";
>
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> + out-ports {
> + port {
> main_funnel_out_port: endpoint {
> remote-endpoint =
> <&soc_funnel_in_port0>;
> };
> };
> + };
>
> - port@1 {
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> reg = <0>;
> main_funnel_in_port0: endpoint {
> - slave-mode;
> remote-endpoint =
> <&cluster0_etf_out>;
> };
> };
>
> - port@2 {
> + port@1 {
> reg = <1>;
> main_funnel_in_port1: endpoint {
> - slave-mode;
> remote-endpoint =
> <&cluster1_etf_out>;
> };
> @@ -569,10 +556,12 @@
> clocks = <&ext_26m>;
> clock-names = "apb_pclk";
>
> - port {
> - etm0_out: endpoint {
> - remote-endpoint =
> - <&cluster0_funnel_in_port0>;
> + out-ports {
> + port {
> + etm0_out: endpoint {
> + remote-endpoint =
> + <&cluster0_funnel_in_port0>;
> + };
> };
> };
> };
> @@ -584,10 +573,12 @@
> clocks = <&ext_26m>;
> clock-names = "apb_pclk";
>
> - port {
> - etm1_out: endpoint {
> - remote-endpoint =
> - <&cluster0_funnel_in_port1>;
> + out-ports {
> + port {
> + etm1_out: endpoint {
> + remote-endpoint =
> + <&cluster0_funnel_in_port1>;
> + };
> };
> };
> };
> @@ -599,10 +590,12 @@
> clocks = <&ext_26m>;
> clock-names = "apb_pclk";
>
> - port {
> - etm2_out: endpoint {
> - remote-endpoint =
> - <&cluster0_funnel_in_port2>;
> + out-ports {
> + port {
> + etm2_out: endpoint {
> + remote-endpoint =
> + <&cluster0_funnel_in_port2>;
> + };
> };
> };
> };
> @@ -614,10 +607,12 @@
> clocks = <&ext_26m>;
> clock-names = "apb_pclk";
>
> - port {
> - etm3_out: endpoint {
> - remote-endpoint =
> - <&cluster0_funnel_in_port3>;
> + out-ports {
> + port {
> + etm3_out: endpoint {
> + remote-endpoint =
> + <&cluster0_funnel_in_port3>;
> + };
> };
> };
> };
> @@ -629,10 +624,12 @@
> clocks = <&ext_26m>;
> clock-names = "apb_pclk";
>
> - port {
> - etm4_out: endpoint {
> - remote-endpoint =
> - <&cluster1_funnel_in_port0>;
> + out-ports {
> + port {
> + etm4_out: endpoint {
> + remote-endpoint =
> + <&cluster1_funnel_in_port0>;
> + };
> };
> };
> };
> @@ -644,10 +641,12 @@
> clocks = <&ext_26m>;
> clock-names = "apb_pclk";
>
> - port {
> - etm5_out: endpoint {
> - remote-endpoint =
> - <&cluster1_funnel_in_port1>;
> + out-ports {
> + port {
> + etm5_out: endpoint {
> + remote-endpoint =
> + <&cluster1_funnel_in_port1>;
> + };
> };
> };
> };
> @@ -659,10 +658,12 @@
> clocks = <&ext_26m>;
> clock-names = "apb_pclk";
>
> - port {
> - etm6_out: endpoint {
> - remote-endpoint =
> - <&cluster1_funnel_in_port2>;
> + out-ports {
> + port {
> + etm6_out: endpoint {
> + remote-endpoint =
> + <&cluster1_funnel_in_port2>;
> + };
> };
> };
> };
> @@ -674,10 +675,12 @@
> clocks = <&ext_26m>;
> clock-names = "apb_pclk";
>
> - port {
> - etm7_out: endpoint {
> - remote-endpoint =
> - <&cluster1_funnel_in_port3>;
> + out-ports {
> + port {
> + etm7_out: endpoint {
> + remote-endpoint =
> + <&cluster1_funnel_in_port3>;
> + };
> };
> };
> };
>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v2 04/11] arm64: dts: sc9836/sc9860: Update coresight bindings for hardware ports
2018-09-27 8:51 ` Suzuki K Poulose
@ 2018-09-27 9:18 ` Chunyan Zhang
2018-09-28 10:45 ` Arnd Bergmann
0 siblings, 1 reply; 29+ messages in thread
From: Chunyan Zhang @ 2018-09-27 9:18 UTC (permalink / raw)
To: Suzuki K Poulose, arm
Cc: Linux ARM, Chunyan Zhang, Mathieu Poirier,
Linux Kernel Mailing List, DTML, Rob Herring, frowand.list,
coresight, Leo Yan, Orson Zhai
Hi Suzuki,
On 27 September 2018 at 16:51, Suzuki K Poulose <suzuki.poulose@arm.com> wrote:
> +To: Chunyan Zhang
>
> Chunyan Zhang,
>
> On 09/12/2018 02:53 PM, Suzuki K Poulose wrote:
>>
>> Switch to the new coresight bindings for hw ports
>>
>
> How can we push this patch ? Do you generally send the spreadtrum
> specific changes to ARM soc folks ? Or would you like me to post
> this directly to ARM soc folks ?
Yeah, at present sprd dts files generally got merged through arm-soc
(I've added arm@kernel.org).
Thanks,
Chunyan
>
> Suzuki
>
>
>> Cc: orsonzhai@gmail.com
>> Cc: zhang.lyra@gmail.com
>> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>> ---
>> arch/arm64/boot/dts/sprd/sc9836.dtsi | 82 +++++-----
>> arch/arm64/boot/dts/sprd/sc9860.dtsi | 215 ++++++++++++++-------------
>> 2 files changed, 153 insertions(+), 144 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/sprd/sc9836.dtsi
>> b/arch/arm64/boot/dts/sprd/sc9836.dtsi
>> index 63894c456969..4bcdbb709c01 100644
>> --- a/arch/arm64/boot/dts/sprd/sc9836.dtsi
>> +++ b/arch/arm64/boot/dts/sprd/sc9836.dtsi
>> @@ -50,10 +50,11 @@
>> reg = <0 0x10003000 0 0x1000>;
>> clocks = <&clk26mhz>;
>> clock-names = "apb_pclk";
>> - port {
>> - etf_in: endpoint {
>> - slave-mode;
>> - remote-endpoint = <&funnel_out_port0>;
>> + in-ports {
>> + port {
>> + etf_in: endpoint {
>> + remote-endpoint =
>> <&funnel_out_port0>;
>> + };
>> };
>> };
>> };
>> @@ -63,55 +64,50 @@
>> reg = <0 0x10001000 0 0x1000>;
>> clocks = <&clk26mhz>;
>> clock-names = "apb_pclk";
>> - ports {
>> +
>> + out-ports {
>> + port {
>> + funnel_out_port0: endpoint {
>> + remote-endpoint = <&etf_in>;
>> + };
>> + };
>> + };
>> +
>> + in-ports {
>> #address-cells = <1>;
>> #size-cells = <0>;
>> - /* funnel output port */
>> port@0 {
>> - reg = <0>;
>> - funnel_out_port0: endpoint {
>> - remote-endpoint = <&etf_in>;
>> - };
>> - };
>> -
>> - /* funnel input port 0-4 */
>> - port@1 {
>> reg = <0>;
>> funnel_in_port0: endpoint {
>> - slave-mode;
>> remote-endpoint = <&etm0_out>;
>> };
>> };
>> - port@2 {
>> + port@1 {
>> reg = <1>;
>> funnel_in_port1: endpoint {
>> - slave-mode;
>> remote-endpoint = <&etm1_out>;
>> };
>> };
>> - port@3 {
>> + port@2 {
>> reg = <2>;
>> funnel_in_port2: endpoint {
>> - slave-mode;
>> remote-endpoint = <&etm2_out>;
>> };
>> };
>> - port@4 {
>> + port@3 {
>> reg = <3>;
>> funnel_in_port3: endpoint {
>> - slave-mode;
>> remote-endpoint = <&etm3_out>;
>> };
>> };
>> - port@5 {
>> + port@4 {
>> reg = <4>;
>> funnel_in_port4: endpoint {
>> - slave-mode;
>> remote-endpoint = <&stm_out>;
>> };
>> };
>> @@ -126,9 +122,11 @@
>> cpu = <&cpu0>;
>> clocks = <&clk26mhz>;
>> clock-names = "apb_pclk";
>> - port {
>> - etm0_out: endpoint {
>> - remote-endpoint = <&funnel_in_port0>;
>> + out-ports {
>> + port {
>> + etm0_out: endpoint {
>> + remote-endpoint =
>> <&funnel_in_port0>;
>> + };
>> };
>> };
>> };
>> @@ -140,9 +138,11 @@
>> cpu = <&cpu1>;
>> clocks = <&clk26mhz>;
>> clock-names = "apb_pclk";
>> - port {
>> - etm1_out: endpoint {
>> - remote-endpoint = <&funnel_in_port1>;
>> + out-ports {
>> + port {
>> + etm1_out: endpoint {
>> + remote-endpoint =
>> <&funnel_in_port1>;
>> + };
>> };
>> };
>> };
>> @@ -154,9 +154,11 @@
>> cpu = <&cpu2>;
>> clocks = <&clk26mhz>;
>> clock-names = "apb_pclk";
>> - port {
>> - etm2_out: endpoint {
>> - remote-endpoint = <&funnel_in_port2>;
>> + out-ports {
>> + port {
>> + etm2_out: endpoint {
>> + remote-endpoint =
>> <&funnel_in_port2>;
>> + };
>> };
>> };
>> };
>> @@ -168,9 +170,11 @@
>> cpu = <&cpu3>;
>> clocks = <&clk26mhz>;
>> clock-names = "apb_pclk";
>> - port {
>> - etm3_out: endpoint {
>> - remote-endpoint = <&funnel_in_port3>;
>> + out-ports {
>> + port {
>> + etm3_out: endpoint {
>> + remote-endpoint =
>> <&funnel_in_port3>;
>> + };
>> };
>> };
>> };
>> @@ -182,9 +186,11 @@
>> reg-names = "stm-base", "stm-stimulus-base";
>> clocks = <&clk26mhz>;
>> clock-names = "apb_pclk";
>> - port {
>> - stm_out: endpoint {
>> - remote-endpoint = <&funnel_in_port4>;
>> + out-ports {
>> + port {
>> + stm_out: endpoint {
>> + remote-endpoint =
>> <&funnel_in_port4>;
>> + };
>> };
>> };
>> };
>> diff --git a/arch/arm64/boot/dts/sprd/sc9860.dtsi
>> b/arch/arm64/boot/dts/sprd/sc9860.dtsi
>> index 48f5928ed45c..5f57bf055cde 100644
>> --- a/arch/arm64/boot/dts/sprd/sc9860.dtsi
>> +++ b/arch/arm64/boot/dts/sprd/sc9860.dtsi
>> @@ -304,30 +304,29 @@
>> reg = <0 0x10001000 0 0x1000>;
>> clocks = <&ext_26m>;
>> clock-names = "apb_pclk";
>> - ports {
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> -
>> - port@0 {
>> - reg = <0>;
>> + out-ports {
>> + port {
>> soc_funnel_out_port: endpoint {
>> remote-endpoint =
>> <&etb_in>;
>> };
>> };
>> + };
>> - port@1 {
>> + in-ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> reg = <0>;
>> soc_funnel_in_port0: endpoint {
>> - slave-mode;
>> remote-endpoint =
>> <&main_funnel_out_port>;
>> };
>> };
>> - port@2 {
>> + port@4 {
>> reg = <4>;
>> soc_funnel_in_port1: endpoint {
>> - slave-mode;
>> remote-endpoint =
>> <&stm_out_port>;
>> };
>> @@ -340,11 +339,12 @@
>> reg = <0 0x10003000 0 0x1000>;
>> clocks = <&ext_26m>;
>> clock-names = "apb_pclk";
>> - port {
>> - etb_in: endpoint {
>> - slave-mode;
>> - remote-endpoint =
>> - <&soc_funnel_out_port>;
>> + out-ports {
>> + port {
>> + etb_in: endpoint {
>> + remote-endpoint =
>> +
>> <&soc_funnel_out_port>;
>> + };
>> };
>> };
>> };
>> @@ -356,10 +356,12 @@
>> reg-names = "stm-base", "stm-stimulus-base";
>> clocks = <&ext_26m>;
>> clock-names = "apb_pclk";
>> - port {
>> - stm_out_port: endpoint {
>> - remote-endpoint =
>> - <&soc_funnel_in_port1>;
>> + out-ports {
>> + port {
>> + stm_out_port: endpoint {
>> + remote-endpoint =
>> +
>> <&soc_funnel_in_port1>;
>> + };
>> };
>> };
>> };
>> @@ -369,38 +371,36 @@
>> reg = <0 0x11001000 0 0x1000>;
>> clocks = <&ext_26m>;
>> clock-names = "apb_pclk";
>> - ports {
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> -
>> - port@0 {
>> - reg = <0>;
>> + out-ports {
>> + port {
>> cluster0_funnel_out_port: endpoint
>> {
>> remote-endpoint =
>>
>> <&cluster0_etf_in>;
>> };
>> };
>> + };
>> - port@1 {
>> + in-ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> reg = <0>;
>> cluster0_funnel_in_port0: endpoint
>> {
>> - slave-mode;
>> remote-endpoint =
>> <&etm0_out>;
>> };
>> };
>> - port@2 {
>> + port@1 {
>> reg = <1>;
>> cluster0_funnel_in_port1: endpoint
>> {
>> - slave-mode;
>> remote-endpoint =
>> <&etm1_out>;
>> };
>> };
>> - port@3 {
>> + port@2 {
>> reg = <2>;
>> cluster0_funnel_in_port2: endpoint
>> {
>> - slave-mode;
>> remote-endpoint =
>> <&etm2_out>;
>> };
>> };
>> @@ -408,7 +408,6 @@
>> port@4 {
>> reg = <4>;
>> cluster0_funnel_in_port3: endpoint
>> {
>> - slave-mode;
>> remote-endpoint =
>> <&etm3_out>;
>> };
>> };
>> @@ -420,46 +419,43 @@
>> reg = <0 0x11002000 0 0x1000>;
>> clocks = <&ext_26m>;
>> clock-names = "apb_pclk";
>> - ports {
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> -
>> - port@0 {
>> - reg = <0>;
>> + out-ports {
>> + port {
>> cluster1_funnel_out_port: endpoint
>> {
>> remote-endpoint =
>>
>> <&cluster1_etf_in>;
>> };
>> };
>> + };
>> - port@1 {
>> + in-ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> reg = <0>;
>> cluster1_funnel_in_port0: endpoint
>> {
>> - slave-mode;
>> remote-endpoint =
>> <&etm4_out>;
>> };
>> };
>> - port@2 {
>> + port@1 {
>> reg = <1>;
>> cluster1_funnel_in_port1: endpoint
>> {
>> - slave-mode;
>> remote-endpoint =
>> <&etm5_out>;
>> };
>> };
>> - port@3 {
>> + port@2 {
>> reg = <2>;
>> cluster1_funnel_in_port2: endpoint
>> {
>> - slave-mode;
>> remote-endpoint =
>> <&etm6_out>;
>> };
>> };
>> - port@4 {
>> + port@3 {
>> reg = <3>;
>> cluster1_funnel_in_port3: endpoint
>> {
>> - slave-mode;
>> remote-endpoint =
>> <&etm7_out>;
>> };
>> };
>> @@ -472,22 +468,18 @@
>> clocks = <&ext_26m>;
>> clock-names = "apb_pclk";
>> - ports {
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> -
>> - port@0 {
>> - reg = <0>;
>> + out-ports {
>> + port {
>> cluster0_etf_out: endpoint {
>> remote-endpoint =
>> <&main_funnel_in_port0>;
>> };
>> };
>> + };
>> - port@1 {
>> - reg = <0>;
>> + in-ports {
>> + port {
>> cluster0_etf_in: endpoint {
>> - slave-mode;
>> remote-endpoint =
>>
>> <&cluster0_funnel_out_port>;
>> };
>> @@ -501,22 +493,18 @@
>> clocks = <&ext_26m>;
>> clock-names = "apb_pclk";
>> - ports {
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> -
>> - port@0 {
>> - reg = <0>;
>> + out-ports {
>> + port {
>> cluster1_etf_out: endpoint {
>> remote-endpoint =
>> <&main_funnel_in_port1>;
>> };
>> };
>> + };
>> - port@1 {
>> - reg = <0>;
>> + in-ports {
>> + port {
>> cluster1_etf_in: endpoint {
>> - slave-mode;
>> remote-endpoint =
>>
>> <&cluster1_funnel_out_port>;
>> };
>> @@ -530,31 +518,30 @@
>> clocks = <&ext_26m>;
>> clock-names = "apb_pclk";
>> - ports {
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> -
>> - port@0 {
>> - reg = <0>;
>> + out-ports {
>> + port {
>> main_funnel_out_port: endpoint {
>> remote-endpoint =
>>
>> <&soc_funnel_in_port0>;
>> };
>> };
>> + };
>> - port@1 {
>> + in-ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> reg = <0>;
>> main_funnel_in_port0: endpoint {
>> - slave-mode;
>> remote-endpoint =
>>
>> <&cluster0_etf_out>;
>> };
>> };
>> - port@2 {
>> + port@1 {
>> reg = <1>;
>> main_funnel_in_port1: endpoint {
>> - slave-mode;
>> remote-endpoint =
>>
>> <&cluster1_etf_out>;
>> };
>> @@ -569,10 +556,12 @@
>> clocks = <&ext_26m>;
>> clock-names = "apb_pclk";
>> - port {
>> - etm0_out: endpoint {
>> - remote-endpoint =
>> -
>> <&cluster0_funnel_in_port0>;
>> + out-ports {
>> + port {
>> + etm0_out: endpoint {
>> + remote-endpoint =
>> +
>> <&cluster0_funnel_in_port0>;
>> + };
>> };
>> };
>> };
>> @@ -584,10 +573,12 @@
>> clocks = <&ext_26m>;
>> clock-names = "apb_pclk";
>> - port {
>> - etm1_out: endpoint {
>> - remote-endpoint =
>> -
>> <&cluster0_funnel_in_port1>;
>> + out-ports {
>> + port {
>> + etm1_out: endpoint {
>> + remote-endpoint =
>> +
>> <&cluster0_funnel_in_port1>;
>> + };
>> };
>> };
>> };
>> @@ -599,10 +590,12 @@
>> clocks = <&ext_26m>;
>> clock-names = "apb_pclk";
>> - port {
>> - etm2_out: endpoint {
>> - remote-endpoint =
>> -
>> <&cluster0_funnel_in_port2>;
>> + out-ports {
>> + port {
>> + etm2_out: endpoint {
>> + remote-endpoint =
>> +
>> <&cluster0_funnel_in_port2>;
>> + };
>> };
>> };
>> };
>> @@ -614,10 +607,12 @@
>> clocks = <&ext_26m>;
>> clock-names = "apb_pclk";
>> - port {
>> - etm3_out: endpoint {
>> - remote-endpoint =
>> -
>> <&cluster0_funnel_in_port3>;
>> + out-ports {
>> + port {
>> + etm3_out: endpoint {
>> + remote-endpoint =
>> +
>> <&cluster0_funnel_in_port3>;
>> + };
>> };
>> };
>> };
>> @@ -629,10 +624,12 @@
>> clocks = <&ext_26m>;
>> clock-names = "apb_pclk";
>> - port {
>> - etm4_out: endpoint {
>> - remote-endpoint =
>> -
>> <&cluster1_funnel_in_port0>;
>> + out-ports {
>> + port {
>> + etm4_out: endpoint {
>> + remote-endpoint =
>> +
>> <&cluster1_funnel_in_port0>;
>> + };
>> };
>> };
>> };
>> @@ -644,10 +641,12 @@
>> clocks = <&ext_26m>;
>> clock-names = "apb_pclk";
>> - port {
>> - etm5_out: endpoint {
>> - remote-endpoint =
>> -
>> <&cluster1_funnel_in_port1>;
>> + out-ports {
>> + port {
>> + etm5_out: endpoint {
>> + remote-endpoint =
>> +
>> <&cluster1_funnel_in_port1>;
>> + };
>> };
>> };
>> };
>> @@ -659,10 +658,12 @@
>> clocks = <&ext_26m>;
>> clock-names = "apb_pclk";
>> - port {
>> - etm6_out: endpoint {
>> - remote-endpoint =
>> -
>> <&cluster1_funnel_in_port2>;
>> + out-ports {
>> + port {
>> + etm6_out: endpoint {
>> + remote-endpoint =
>> +
>> <&cluster1_funnel_in_port2>;
>> + };
>> };
>> };
>> };
>> @@ -674,10 +675,12 @@
>> clocks = <&ext_26m>;
>> clock-names = "apb_pclk";
>> - port {
>> - etm7_out: endpoint {
>> - remote-endpoint =
>> -
>> <&cluster1_funnel_in_port3>;
>> + out-ports {
>> + port {
>> + etm7_out: endpoint {
>> + remote-endpoint =
>> +
>> <&cluster1_funnel_in_port3>;
>> + };
>> };
>> };
>> };
>>
>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v2 04/11] arm64: dts: sc9836/sc9860: Update coresight bindings for hardware ports
2018-09-27 9:18 ` Chunyan Zhang
@ 2018-09-28 10:45 ` Arnd Bergmann
2018-09-28 11:09 ` Chunyan Zhang
0 siblings, 1 reply; 29+ messages in thread
From: Arnd Bergmann @ 2018-09-28 10:45 UTC (permalink / raw)
To: Lyra Zhang
Cc: Suzuki K Poulose, arm-soc, Linux ARM, Chunyan Zhang,
Mathieu Poirier, Linux Kernel Mailing List, DTML, Rob Herring,
Frank Rowand, coresight, Leo Yan, Orson Zhai
On Thu, Sep 27, 2018 at 11:19 AM Chunyan Zhang <zhang.lyra@gmail.com> wrote:
>
> Hi Suzuki,
>
> On 27 September 2018 at 16:51, Suzuki K Poulose <suzuki.poulose@arm.com> wrote:
> > +To: Chunyan Zhang
> >
> > Chunyan Zhang,
> >
> > On 09/12/2018 02:53 PM, Suzuki K Poulose wrote:
> >>
> >> Switch to the new coresight bindings for hw ports
> >>
> >
> > How can we push this patch ? Do you generally send the spreadtrum
> > specific changes to ARM soc folks ? Or would you like me to post
> > this directly to ARM soc folks ?
>
> Yeah, at present sprd dts files generally got merged through arm-soc
> (I've added arm@kernel.org).
Yes, that's fine. Generally, we prefer if you collect patches for your
platform first, and then send them as a pull request or short set
of patches. for inclusion, rather than picking them up from the list.
If this is the only DT patch for spreadtrum in 4.20, I can also just
pick it up with your Ack.
Arnd
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v2 04/11] arm64: dts: sc9836/sc9860: Update coresight bindings for hardware ports
2018-09-28 10:45 ` Arnd Bergmann
@ 2018-09-28 11:09 ` Chunyan Zhang
0 siblings, 0 replies; 29+ messages in thread
From: Chunyan Zhang @ 2018-09-28 11:09 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Suzuki K Poulose, arm-soc, Linux ARM, Chunyan Zhang,
Mathieu Poirier, Linux Kernel Mailing List, DTML, Rob Herring,
Frank Rowand, coresight, Leo Yan, Orson Zhai
On 28 September 2018 at 18:45, Arnd Bergmann <arnd@arndb.de> wrote:
> On Thu, Sep 27, 2018 at 11:19 AM Chunyan Zhang <zhang.lyra@gmail.com> wrote:
>>
>> Hi Suzuki,
>>
>> On 27 September 2018 at 16:51, Suzuki K Poulose <suzuki.poulose@arm.com> wrote:
>> > +To: Chunyan Zhang
>> >
>> > Chunyan Zhang,
>> >
>> > On 09/12/2018 02:53 PM, Suzuki K Poulose wrote:
>> >>
>> >> Switch to the new coresight bindings for hw ports
>> >>
>> >
>> > How can we push this patch ? Do you generally send the spreadtrum
>> > specific changes to ARM soc folks ? Or would you like me to post
>> > this directly to ARM soc folks ?
>>
>> Yeah, at present sprd dts files generally got merged through arm-soc
>> (I've added arm@kernel.org).
>
> Yes, that's fine. Generally, we prefer if you collect patches for your
> platform first, and then send them as a pull request or short set
> of patches. for inclusion, rather than picking them up from the list.
>
Ok, I will send you a patchset once merge window open.
Thanks,
Chunyan
> If this is the only DT patch for spreadtrum in 4.20, I can also just
> pick it up with your Ack.
>
> Arnd
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH v2 05/11] arm64: dts: msm8916: Update coresight bindings for hardware ports
2018-09-27 8:18 ` Suzuki K Poulose
@ 2018-09-30 17:12 ` Andy Gross
0 siblings, 0 replies; 29+ messages in thread
From: Andy Gross @ 2018-09-30 17:12 UTC (permalink / raw)
To: Suzuki K Poulose
Cc: linux-arm-kernel, devicetree, Mathieu Poirier, robh, coresight,
Linux Kernel Mailing List, David Brown, leo.yan, frowand.list,
Ivan T . Ivanov
On Thu, Sep 27, 2018 at 09:18:06AM +0100, Suzuki K Poulose wrote:
> Hi Andy
>
> On 09/12/2018 02:53 PM, Suzuki K Poulose wrote:
> >Switch to updated coresight bindings for hw ports
> >
> >Cc: Andy Gross <andy.gross@linaro.org>
> >Cc: David Brown <david.brown@linaro.org>
> >Cc: Ivan T. Ivanov <ivan.ivanov@linaro.org>
> >Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> >Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> >---
> >Changes since v1:
> > - Fixed TPIU port direction
> > - Use better subject tag for the patch
> >---
>
>
> Please could you pull this and the patch for ARM (Patch 9/11) ?
>
> Suzuki
Done. Thanks
^ permalink raw reply [flat|nested] 29+ messages in thread
end of thread, other threads:[~2018-09-30 17:12 UTC | newest]
Thread overview: 29+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-09-12 13:53 [PATCH v2 00/11] dts: Update coresight device tree bindings Suzuki K Poulose
2018-09-12 13:53 ` [PATCH v2 01/11] coresight: dts: binding: Fix example for TPIU component Suzuki K Poulose
2018-09-26 20:30 ` Rob Herring
2018-09-12 13:53 ` [PATCH v2 02/11] coresight: dts: binding: Update coresight binding examples Suzuki K Poulose
2018-09-12 13:53 ` [PATCH v2 03/11] arm64: dts: hi6220: Update coresight bindings for hardware ports Suzuki K Poulose
2018-09-21 14:06 ` Wei Xu
2018-09-12 13:53 ` [PATCH v2 04/11] arm64: dts: sc9836/sc9860: " Suzuki K Poulose
2018-09-27 8:51 ` Suzuki K Poulose
2018-09-27 9:18 ` Chunyan Zhang
2018-09-28 10:45 ` Arnd Bergmann
2018-09-28 11:09 ` Chunyan Zhang
2018-09-12 13:53 ` [PATCH v2 05/11] arm64: dts: msm8916: " Suzuki K Poulose
2018-09-27 8:18 ` Suzuki K Poulose
2018-09-30 17:12 ` Andy Gross
2018-09-12 13:53 ` [PATCH v2 06/11] arm: dts: hip04: " Suzuki K Poulose
2018-09-21 14:06 ` Wei Xu
2018-09-12 13:53 ` [PATCH v2 07/11] arm: dts: imx7: Update coresight binding " Suzuki K Poulose
2018-09-26 2:24 ` Shawn Guo
2018-09-12 13:53 ` [PATCH v2 08/11] arm: dts: omap: Update coresight bindings " Suzuki K Poulose
2018-09-20 22:01 ` Tony Lindgren
2018-09-12 13:53 ` [PATCH v2 09/11] arm: dts: qcom: " Suzuki K Poulose
2018-09-12 13:53 ` [PATCH v2 10/11] arm: dts: sama5d2: " Suzuki K Poulose
2018-09-19 17:12 ` Alexandre Belloni
2018-09-12 13:53 ` [PATCH v2 11/11] arm: dts: ste-dbx5x0: Update coresight bindings for hardware port Suzuki K Poulose
2018-09-14 8:43 ` Linus Walleij
2018-09-14 8:58 ` Suzuki K Poulose
2018-09-20 22:02 ` Linus Walleij
2018-09-21 9:24 ` Suzuki K Poulose
2018-09-19 23:29 ` [PATCH v2 00/11] dts: Update coresight device tree bindings Mathieu Poirier
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).