From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9B5DC433EF for ; Thu, 19 May 2022 13:44:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238898AbiESNnA (ORCPT ); Thu, 19 May 2022 09:43:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46530 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230402AbiESNmf (ORCPT ); Thu, 19 May 2022 09:42:35 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 01B913ED3D; Thu, 19 May 2022 06:42:33 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8FBBB15DB; Thu, 19 May 2022 06:42:33 -0700 (PDT) Received: from [10.57.3.56] (unknown [10.57.3.56]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 04D473F66F; Thu, 19 May 2022 06:42:30 -0700 (PDT) Message-ID: <4031d3a2-9f37-4399-f4b0-8a60d0d8193b@arm.com> Date: Thu, 19 May 2022 14:42:28 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PATCH 00/20] perf vendors events arm64: Multiple Arm CPUs To: John Garry , Robin Murphy , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, acme@kernel.org Cc: Will Deacon , Mathieu Poirier , Leo Yan , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Andi Kleen , Kajol Jain , James Clark , Andrew Kilroy References: <20220510104758.64677-1-nick.forrington@arm.com> <28509191-3a45-de6d-f5bc-a8e7331c0a9e@huawei.com> From: Nick Forrington In-Reply-To: <28509191-3a45-de6d-f5bc-a8e7331c0a9e@huawei.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 18/05/2022 09:15, John Garry wrote: > On 17/05/2022 15:32, Robin Murphy wrote: >> >> On 2022-05-10 11:47, Nick Forrington wrote: >>> Add Performance Monitoring Unit event data for the Arm CPUs listed >>> below. >>> >>> Changesets are dependent due to incremental updates to the common >>> events >>> file and mapfile.csv. >>> >>> Data is sourced from https://github.com/ARM-software/data >>> >>> Nick Forrington (20): >>>    perf vendors events arm64: Arm Cortex-A5 >>>    perf vendors events arm64: Arm Cortex-A7 >>>    perf vendors events arm64: Arm Cortex-A8 >>>    perf vendors events arm64: Arm Cortex-A9 >>>    perf vendors events arm64: Arm Cortex-A15 >>>    perf vendors events arm64: Arm Cortex-A17 >>>    perf vendors events arm64: Arm Cortex-A32 >> >> Obligatory question over anything relating to the above CPUs being in >> an "arch/arm64" directory... ;) > > If we were to add to arm32/arm then the common event numbers and maybe > other JSONs in future would need to be duplicated. > > Would there be any reason to add to arm32/arm apart to from being > strictly proper? Maybe if lots of other 32b support for other vendors > came along then it could make sense (to separate them out). Not that I'm aware of, although I don't have these available to test. I'm happy to re-submit without these CPUs if it simplifies things. Thanks, Nick