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From: Slade Maurer <smaurer@teja.com>
To: dsaxena@plexity.net
Cc: Dave <dave.jiang@gmail.com>,
	linux-kernel@vger.kernel.org, torvalds@osdl.org,
	linux@arm.linux.org.uk, drew.moseley@intel.com
Subject: Re: clean way to support >32bit addr on 32bit CPU
Date: Mon, 10 Jan 2005 16:35:14 -0800	[thread overview]
Message-ID: <41E31F42.2000008@teja.com> (raw)
In-Reply-To: <20050111000050.GA7958@plexity.net>

Deepak Saxena wrote:

>On Jan 10 2005, at 16:01, Slade Maurer was caught saying:
>  
>
>>Also, it would be nice to have PTEs to represent the upper 4GB such that 
>>it can be mmapped to user space. PAE handled this in and it would be 
>>great to have it in ARM MMU36 as well.
>>    
>>
>
>Not doable. I believe PAE allows for normal 4K pages to be used when
>mapping > 32-bits. XSC3 and ARMv6 only allow for > 32 bit addresses 
>when using 16MB pages (supersections), so we need to instead use
>the hugetlb approach.
>
>~Deepak
>
>  
>
You are right of course. The MMUs first level descriptors force you to 
have 16MB pages.

I don't see anything wrong with using hugeTLB. Then it is up to the user 
to get hugetlbfs setup so that they can mmap(...) properly. This is 
forced on us by the designers of the MMU ;)

I think that is better than setting permissions during ioremap(...) so 
that a user space process can use a kernel virtual address for user 
space access.

 -Slade


  reply	other threads:[~2005-01-11  0:32 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-01-10 23:34 clean way to support >32bit addr on 32bit CPU Dave
2005-01-11  0:01 ` Slade Maurer
2005-01-11  0:00   ` Deepak Saxena
2005-01-11  0:35     ` Slade Maurer [this message]
2005-01-11  0:04 ` Roland Dreier
2005-01-11  0:09 ` Linus Torvalds
2005-01-11  0:28   ` Randy.Dunlap
2005-01-11  1:30     ` Linus Torvalds
2005-01-11  2:05       ` William Lee Irwin III
2005-01-11  3:38         ` Randy.Dunlap
2005-01-11 17:39       ` Randy.Dunlap
2005-01-11 18:18         ` Linus Torvalds
2005-01-11 19:40   ` Dave

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