Re: [PATCH] m68knommu: cache init code for ColdFire CPU's

Re: [PATCH] m68knommu: cache init code for ColdFire CPU's

[Geert Uytterhoeven]

On Mon, 10 Jan 2005, Linux Kernel Mailing List wrote:
> ChangeSet 1.2275, 2005/01/10 07:57:44-08:00, gerg@snapgear.com
> 
> 	[PATCH] m68knommu: cache init code for ColdFire CPU's
> 	
> 	Cache initialization code for the ColdFire CPU's. They are not
> 	all identical. This code is used as part of the common head
> 	start code for all ColdFire platforms.
> 	
> 	Signed-off-by: Greg Ungerer <gerg@snapgear.com>
> 	Signed-off-by: Linus Torvalds <torvalds@osdl.org>
> 
> 
> 
>  mcfcache.h |  125 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
>  1 files changed, 125 insertions(+)
> 
> 
> diff -Nru a/include/asm-m68knommu/mcfcache.h b/include/asm-m68knommu/mcfcache.h
> --- /dev/null	Wed Dec 31 16:00:00 196900
> +++ b/include/asm-m68knommu/mcfcache.h	2005-01-10 09:11:23 -08:00

> + *	Everything from a small linstruction only cache, to configurable
                                ^^^^^^^^^^^^
				instruction

> + *	Simple verion 2 core cache. These have instruction cache only,
               ^^^^^^
	       version

> + *	Version 4 cores have a true hardvard style separate instruction
                                    ^^^^^^^^
				    harvard

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

Re: [PATCH] m68knommu: cache init code for ColdFire CPU's

[Greg Ungerer]

Hi Geert,

Thanks :-)
I submit these corrections :-)

Regards
Greg




Geert Uytterhoeven wrote:
> On Mon, 10 Jan 2005, Linux Kernel Mailing List wrote:
>>diff -Nru a/include/asm-m68knommu/mcfcache.h b/include/asm-m68knommu/mcfcache.h
>>--- /dev/null	Wed Dec 31 16:00:00 196900
>>+++ b/include/asm-m68knommu/mcfcache.h	2005-01-10 09:11:23 -08:00
> 
> 
>>+ *	Everything from a small linstruction only cache, to configurable
> 
>                                 ^^^^^^^^^^^^
> 				instruction
> 
> 
>>+ *	Simple verion 2 core cache. These have instruction cache only,
> 
>                ^^^^^^
> 	       version
> 
> 
>>+ *	Version 4 cores have a true hardvard style separate instruction
> 
>                                     ^^^^^^^^
> 				    harvard
> 
> Gr{oetje,eeting}s,
> 
> 						Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> 							    -- Linus Torvalds
> 

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