Re: [PATCH v2 7/7] KVM: VMX: Simplify capability check when handling PERF_CAPABILITIES write

From: Like Xu <like.xu.linux@gmail.com>
To: Sean Christopherson <seanjc@google.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
	linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
	kvm@vger.kernel.org, Paolo Bonzini <pbonzini@redhat.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Ingo Molnar <mingo@redhat.com>
Subject: Re: [PATCH v2 7/7] KVM: VMX: Simplify capability check when handling PERF_CAPABILITIES write
Date: Thu, 4 Aug 2022 15:52:30 +0800	[thread overview]
Message-ID: <41e0b2a0-c53d-870f-d619-4008eb222d42@gmail.com> (raw)
In-Reply-To: <20220803192658.860033-8-seanjc@google.com>

On 4/8/2022 3:26 am, Sean Christopherson wrote:
> Explicitly check for the absence of host support for LBRs or PEBS when
> userspace attempts to enable said features by writing PERF_CAPABILITIES.
> Comparing host support against the incoming value is unnecessary and
> weird since the checks are buried inside an if-statement that verifies
> userspace wants to enable the feature.

If you mean this part in the KVM:

	case MSR_IA32_PERF_CAPABILITIES: {
		...
		if (data & ~msr_ent.data)
			return 1;
		...

then this patch brings a flaw, for example:

a user space can successfully set 0x1 on a host that reports a value of 0x5,
which should not happen since the semantics of 0x1 and 0x5 for LBR_FMT
may be completely different from the guest LBR driver's perspective.

For such a model-specific feature, it needs to write to PERF_CAPABILITIES
the exact value reported by the host/kvm.

A selftest is proposed in the hope of guarding this contract.

> 
> No functional change intended.
> 
> Signed-off-by: Sean Christopherson <seanjc@google.com>
> ---
>   arch/x86/kvm/vmx/vmx.c | 6 ++----
>   1 file changed, 2 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index d7f8331d6f7e..0ada0ee234b7 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -2323,15 +2323,13 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>   		if (data && !vcpu_to_pmu(vcpu)->version)
>   			return 1;
>   		if (data & PMU_CAP_LBR_FMT) {
> -			if ((data & PMU_CAP_LBR_FMT) !=
> -			    (vmx_get_perf_capabilities() & PMU_CAP_LBR_FMT))
> +			if (!(vmx_get_perf_capabilities() & PMU_CAP_LBR_FMT))
>   				return 1;
>   			if (!cpuid_model_is_consistent(vcpu))
>   				return 1;
>   		}
>   		if (data & PERF_CAP_PEBS_FORMAT) {
> -			if ((data & PERF_CAP_PEBS_MASK) !=
> -			    (vmx_get_perf_capabilities() & PERF_CAP_PEBS_MASK))
> +			if (!(vmx_get_perf_capabilities() & PERF_CAP_PEBS_MASK))
>   				return 1;
>   			if (!guest_cpuid_has(vcpu, X86_FEATURE_DS))
>   				return 1;