From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41605C34022 for ; Mon, 17 Feb 2020 14:10:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 183272072C for ; Mon, 17 Feb 2020 14:10:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728841AbgBQOKp (ORCPT ); Mon, 17 Feb 2020 09:10:45 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:15000 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727739AbgBQOKp (ORCPT ); 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Mon, 17 Feb 2020 14:10:14 GMT Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A667CBE054; Mon, 17 Feb 2020 14:10:14 +0000 (GMT) Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4AFB1BE051; Mon, 17 Feb 2020 14:10:13 +0000 (GMT) Received: from leobras.br.ibm.com (unknown [9.18.235.152]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP; Mon, 17 Feb 2020 14:10:13 +0000 (GMT) Message-ID: <423702075b0dcb129dca83ae3a98b090d58ad0e7.camel@linux.ibm.com> Subject: Re: [PATCH] powerpc/8xx: Fix clearing of bits 20-23 in ITLB miss From: Leonardo Bras To: Christophe Leroy , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Date: Mon, 17 Feb 2020 11:10:09 -0300 In-Reply-To: <1d6a53ab-ea72-7452-ea5f-43dd70b223c9@c-s.fr> References: <4f70c2778163affce8508a210f65d140e84524b4.1581272050.git.christophe.leroy@c-s.fr> <546ce4737f308a4ba99a53f550de5b44abc06444.camel@linux.ibm.com> <1d6a53ab-ea72-7452-ea5f-43dd70b223c9@c-s.fr> Content-Type: multipart/signed; micalg="pgp-sha256"; protocol="application/pgp-signature"; boundary="=-VzmBVc8/yToR3dI4YbK+" User-Agent: Evolution 3.34.3 (3.34.3-1.fc31) MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-17_08:2020-02-17,2020-02-17 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 suspectscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 malwarescore=0 phishscore=0 mlxlogscore=999 adultscore=0 mlxscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002170117 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --=-VzmBVc8/yToR3dI4YbK+ Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Sat, 2020-02-15 at 11:17 +0100, Christophe Leroy wrote: >=20 > Le 15/02/2020 =C3=A0 07:28, Leonardo Bras a =C3=A9crit : > > On Sun, 2020-02-09 at 18:14 +0000, Christophe Leroy wrote: > > > In ITLB miss handled the line supposed to clear bits 20-23 on the > > > L2 ITLB entry is buggy and does indeed nothing, leading to undefined > > > value which could allow execution when it shouldn't. > > >=20 > > > Properly do the clearing with the relevant instruction. > > >=20 > > > Fixes: 74fabcadfd43 ("powerpc/8xx: don't use r12/SPRN_SPRG_SCRATCH2 i= n TLB Miss handlers") > > > Cc: stable@vger.kernel.org > > > Signed-off-by: Christophe Leroy > > > --- > > > arch/powerpc/kernel/head_8xx.S | 2 +- > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > >=20 > > > diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/hea= d_8xx.S > > > index 9922306ae512..073a651787df 100644 > > > --- a/arch/powerpc/kernel/head_8xx.S > > > +++ b/arch/powerpc/kernel/head_8xx.S > > > @@ -256,7 +256,7 @@ InstructionTLBMiss: > > > * set. All other Linux PTE bits control the behavior > > > * of the MMU. > > > */ > > > - rlwimi r10, r10, 0, 0x0f00 /* Clear bits 20-23 */ > > > + rlwinm r10, r10, 0, ~0x0f00 /* Clear bits 20-23 */ > > > rlwimi r10, r10, 4, 0x0400 /* Copy _PAGE_EXEC into bit 21 */ > > > ori r10, r10, RPN_PATTERN | 0x200 /* Set 22 and 24-27 */ > > > mtspr SPRN_MI_RPN, r10 /* Update TLB entry */ > >=20 > > Looks a valid change. > > rlwimi r10, r10, 0, 0x0f00 means: > > r10 =3D ((r10 << 0) & 0x0f00) | (r10 & ~0x0f00) which ends up being > > r10 =3D r10 > >=20 > > On ISA, rlwinm is recommended for clearing high order bits. > > rlwinm r10, r10, 0, ~0x0f00 means: > > r10 =3D (r10 << 0) & ~0x0f00 > >=20 > > Which does exactly what the comments suggests. > >=20 > > FWIW: > > Reviwed-by: Leonardo Bras > >=20 >=20 > I guess you mean >=20 > Reviewed-by: Leonardo Bras Yes, sorry for the typo. --=-VzmBVc8/yToR3dI4YbK+ Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEMdeUgIzgjf6YmUyOlQYWtz9SttQFAl5KnsEACgkQlQYWtz9S ttSWQw//Qk881kecmznRJws7Dniga+I79I0aWy8xbXeMV7u8p7eLeom2HeZydUo0 Jg/DFMiNnoMj77138Ht07KdADYV8fdE59DW66YufBfEevltanJ6tS8Zj/MV0js5H H5OphYNon2NWw5fCRpYGRlQJi+BsM7c6s/fpVW0xsEWg6MvRekLSOCs/gtEwFWDn Rxj9jY7+gvDJyMYR59cMJH07F9Ob7Bbu4PSUM8YbPNwgFtjR49WSAGsV0VCfN9L8 Kz+52aOj9m48kA2PG5XiejC56+Tp06vGbo4ODjZY/5+b+OcG9O5P9qM7x4TCPfL3 BsJKBBbj4nyWUSCfYkHOSP3PenZ1g/ZUffUZA2WiDC/ia7UTG+4PWlnqchPg5kz7 liFfO34RKPnZSjVKTjpxcRERu5azbc8LryKEW6QI4nb1Ol59JLK0HItnmPG+YW4d trrjOfrj/0jP6HI8HzGMDoEbMFD6lfuf81oNQV8p26U+3x02PK2dEfeilgb6QFMv BRvFzwj2GGuNI+vOIWm5DsdLin3KaqAFZ2CZGt/VYWH1AAil6umwsSAcQRz84tvW UblRqtrV5tUaA7aKzgvyuu/mSrF0URrzA75eWjneM4MljkY77cHIAZ6RpByJ/Iim OBUhPODqgdGdwC0R9YwRB5KX6NbEx6y/wmqsmsivWTYTecp73QM= =LUct -----END PGP SIGNATURE----- --=-VzmBVc8/yToR3dI4YbK+--