From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753162AbcKGOGo (ORCPT ); Mon, 7 Nov 2016 09:06:44 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:53577 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751296AbcKGOGh (ORCPT ); Mon, 7 Nov 2016 09:06:37 -0500 Subject: Re: [PATCH 1/6] clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards To: Daniel Thompson , Rob Herring , Mark Rutland , Russell King , Maxime Coquelin , Alexandre Torgue , Michael Turquette , Stephen Boyd , Nicolas Pitre , Arnd Bergmann , References: <1478523943-23142-1-git-send-email-gabriel.fernandez@st.com> <1478523943-23142-2-git-send-email-gabriel.fernandez@st.com> CC: , , , , , , , From: Gabriel Fernandez Message-ID: <42c31c00-3b0b-b1e7-46c1-0c849b14dae2@st.com> Date: Mon, 7 Nov 2016 15:05:46 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.48.1.80] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-11-07_05:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Daniel, Thanks for reviewing. On 11/07/2016 02:53 PM, Daniel Thompson wrote: > On 07/11/16 13:05, gabriel.fernandez@st.com wrote: >> From: Gabriel Fernandez >> >> This patch introduces PLL_I2S and PLL_SAI. >> Vco clock of these PLLs can be modify by DT (only n multiplicator, >> m divider is still fixed by the boot-loader). >> Each PLL has 3 dividers. PLL should be off when we modify the rate. >> >> Signed-off-by: Gabriel Fernandez >> --- >> drivers/clk/clk-stm32f4.c | 371 >> ++++++++++++++++++++++++++++++++++++++++++++-- >> 1 file changed, 359 insertions(+), 12 deletions(-) >> >> diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c >> index c2661e2..7641acd 100644 >> --- a/drivers/clk/clk-stm32f4.c >> +++ b/drivers/clk/clk-stm32f4.c >> @@ -28,6 +28,7 @@ > > ... >> +static const struct clk_div_table pll_divp_table[] = { >> + { 0, 2 }, { 1, 4 }, { 2, 6 }, { 3, 8 }, >> +}; >> + >> /* >> * Decode current PLL state and (statically) model the state we >> inherit from >> * the bootloader. >> */ > > This comment isn't right. For a start the model is no longer static. > you're right, i will suppress it. > >> @@ -615,18 +944,24 @@ struct stm32f4_clk_data { >> const struct stm32f4_gate_data *gates_data; >> const u64 *gates_map; >> int gates_num; >> + const struct stm32f4_pll_data *pll_data; >> + int pll_num; > > pll_num is unused. > ok BR Gabriel > > Daniel.