From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: "sandy.huang" <hjc@rock-chips.com>,
dri-devel@lists.freedesktop.org,
Maxime Ripard <maxime.ripard@bootlin.com>,
Sean Paul <sean@poorly.run>, David Airlie <airlied@linux.ie>,
Daniel Vetter <daniel@ffwll.ch>
Cc: heiko@sntech.de, Ayan.Halder@arm.com, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] drm: Add some new format DRM_FORMAT_NVXX_10
Date: Wed, 25 Sep 2019 11:23:27 +0200 [thread overview]
Message-ID: <434dc7ec-5029-4609-f6f3-0766091315ec@linux.intel.com> (raw)
In-Reply-To: <e0c272ff-5ef9-f5db-4dad-477ecae2e6ca@rock-chips.com>
Op 25-09-2019 om 10:32 schreef sandy.huang:
>
> 在 2019/9/25 下午4:17, Maarten Lankhorst 写道:
>> Op 25-09-2019 om 10:06 schreef Sandy Huang:
>>> These new format is supported by some rockchip socs:
>>>
>>> DRM_FORMAT_NV12_10/DRM_FORMAT_NV21_10
>>> DRM_FORMAT_NV16_10/DRM_FORMAT_NV61_10
>>> DRM_FORMAT_NV24_10/DRM_FORMAT_NV42_10
>>>
>>> Signed-off-by: Sandy Huang <hjc@rock-chips.com>
>>> ---
>>> drivers/gpu/drm/drm_fourcc.c | 18 ++++++++++++++++++
>>> include/uapi/drm/drm_fourcc.h | 14 ++++++++++++++
>>> 2 files changed, 32 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
>>> index c630064..f25fa81 100644
>>> --- a/drivers/gpu/drm/drm_fourcc.c
>>> +++ b/drivers/gpu/drm/drm_fourcc.c
>>> @@ -274,6 +274,24 @@ const struct drm_format_info *__drm_format_info(u32 format)
>>> { .format = DRM_FORMAT_YUV420_10BIT, .depth = 0,
>>> .num_planes = 1, .cpp = { 0, 0, 0 }, .hsub = 2, .vsub = 2,
>>> .is_yuv = true },
>>> + { .format = DRM_FORMAT_NV12_10, .depth = 0,
>>> + .num_planes = 2, .cpp = { 0, 0, 0 }, .hsub = 2, .vsub = 2,
>>> + .is_yuv = true },
>>> + { .format = DRM_FORMAT_NV21_10, .depth = 0,
>>> + .num_planes = 2, .cpp = { 0, 0, 0 }, .hsub = 2, .vsub = 2,
>>> + .is_yuv = true },
>>> + { .format = DRM_FORMAT_NV16_10, .depth = 0,
>>> + .num_planes = 2, .cpp = { 0, 0, 0 }, .hsub = 2, .vsub = 1,
>>> + .is_yuv = true },
>>> + { .format = DRM_FORMAT_NV61_10, .depth = 0,
>>> + .num_planes = 2, .cpp = { 0, 0, 0 }, .hsub = 2, .vsub = 1,
>>> + .is_yuv = true },
>>> + { .format = DRM_FORMAT_NV24_10, .depth = 0,
>>> + .num_planes = 2, .cpp = { 0, 0, 0 }, .hsub = 1, .vsub = 1,
>>> + .is_yuv = true },
>>> + { .format = DRM_FORMAT_NV42_10, .depth = 0,
>>> + .num_planes = 2, .cpp = { 0, 0, 0 }, .hsub = 1, .vsub = 1,
>>> + .is_yuv = true },
>>> };
>>> unsigned int i;
>>> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
>>> index 3feeaa3..0479f47 100644
>>> --- a/include/uapi/drm/drm_fourcc.h
>>> +++ b/include/uapi/drm/drm_fourcc.h
>>> @@ -238,6 +238,20 @@ extern "C" {
>>> #define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */
>>> /*
>>> + * 2 plane YCbCr 10bit
>>> + * index 0 = Y plane, [9:0] Y
>>> + * index 1 = Cr:Cb plane, [19:0]
>>> + * or
>>> + * index 1 = Cb:Cr plane, [19:0]
>>> + */
>>> +#define DRM_FORMAT_NV12_10 fourcc_code('N', 'A', '1', '2') /* 2x2 subsampled Cr:Cb plane */
>>> +#define DRM_FORMAT_NV21_10 fourcc_code('N', 'A', '2', '1') /* 2x2 subsampled Cb:Cr plane */
>>> +#define DRM_FORMAT_NV16_10 fourcc_code('N', 'A', '1', '6') /* 2x1 subsampled Cr:Cb plane */
>>> +#define DRM_FORMAT_NV61_10 fourcc_code('N', 'A', '6', '1') /* 2x1 subsampled Cb:Cr plane */
>>> +#define DRM_FORMAT_NV24_10 fourcc_code('N', 'A', '2', '4') /* non-subsampled Cr:Cb plane */
>>> +#define DRM_FORMAT_NV42_10 fourcc_code('N', 'A', '4', '2') /* non-subsampled Cb:Cr plane */
>>> +
>>> +/*
>>> * 2 plane YCbCr MSB aligned
>>> * index 0 = Y plane, [15:0] Y:x [10:6] little endian
>>> * index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [10:6:10:6] little endian
>> What are the other bits, they are not mentioned?
>
> It's compact layout
>
> Yplane:
>
> Y0[9:0]Y1[9:0]Y2[9:0]Y3[9:0]...
>
> UVplane:
>
> U0[9:0]V0[9:0]U1[9:0]V1[9:0]...
This should be put in the comment then, for clarity. :) Probably needs 4 pixels to describe how it fits in 5 (or 10 for cbcr) bytes.
Cheers,
Maarten
next prev parent reply other threads:[~2019-09-25 9:24 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1569398801-92201-1-git-send-email-hjc@rock-chips.com>
2019-09-25 8:06 ` [PATCH 1/3] drm: Add some new format DRM_FORMAT_NVXX_10 Sandy Huang
2019-09-25 8:17 ` Maarten Lankhorst
2019-09-25 8:32 ` sandy.huang
2019-09-25 9:23 ` Maarten Lankhorst [this message]
2019-09-25 11:01 ` sandy.huang
2019-09-25 11:20 ` Daniel Vetter
2019-09-26 8:30 ` sandy.huang
2019-09-25 8:06 ` [PATCH 2/3] drm/rockchip: Add vop_format_get_bpp to get format bpp Sandy Huang
2019-09-25 8:06 ` [PATCH 3/3] drm/rockchip: Add support 10bit yuv format Sandy Huang
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