From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965173AbbKDKbY (ORCPT ); Wed, 4 Nov 2015 05:31:24 -0500 Received: from mout.kundenserver.de ([212.227.126.130]:59593 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S964914AbbKDKbX (ORCPT ); Wed, 4 Nov 2015 05:31:23 -0500 From: Arnd Bergmann To: Daniel Lezcano Cc: Jisheng Zhang , tglx@linutronix.de, linux@arm.linux.org.uk, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 0/3] let Marvell Berlin SoCs make use of the best delay timer Date: Wed, 04 Nov 2015 11:30:43 +0100 Message-ID: <4359736.Q4L68M2aRW@wuerfel> User-Agent: KMail/4.11.5 (Linux/3.16.0-10-generic; KDE/4.11.5; x86_64; ; ) In-Reply-To: <5639D409.1030302@linaro.org> References: <1446560917-6318-1-git-send-email-jszhang@marvell.com> <5639D409.1030302@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:5ZQ+zRu9zkqaBpOl50LetP3aGFXuZl5Ys/Vm3zO0XhyFuOEiw+S 2pSis6ok1Kzw+Dwdlh1mhjpHepAe4c97f6dpvK3JoMdZirZNNI9Vg8H7BXfP1Abh3pU0yu9 XCqz/OD/adEqMafjayYg87aMIv7jsyeY7d3l5U2Nhw6h5SApQu7KKjcRdelzs2X5gIcZIcb Z7CtQ23mRnmaQjdvOz8PA== X-UI-Out-Filterresults: notjunk:1;V01:K0:uyXIb3G5H3s=:0TalsjCN5X9BqHcqgR+yCT 0Gd9AtOHaH275X4Lq6FF6eEt6nhFVn2o9/0NyT+9khkSej1QLI5Z+Qw4W8ueS3jNViTXAufK5 awRu8W4DNXGBV8subWBxGHGNWLlt6S9Ta0DaD7L52H5TjFKwgNqNc9iCBciV8T6mkzTzbNwE4 PpcQGxXnt+kYolY3svUzKA4Bkv6Nb5BDUgJpbBOKNVAsLeMxmLukoennF2PebsqprKQ0WT4Vn ynUO/b0BGfl/k5R39dvakccdhTtwkEHMFg5kztqDfVir44SVo3KV2fIs54kBAraWI7HdFVDyb ISwepQn2DL6iH9KuyHCYuGaBcHRQKexyTycEFQvOqWlpr49aLNDajO/ursxH+3xWXbvyo5STa GDYRxrm902wtTRqQ1IpCudNk4k1ZvFuTMyTXE9ES9fIRANjYbHRJGSFyFAlDfvwdtydk2OCMq To7xMgBPULfJwCGbJPe6zLP9Cr0RAVG3YILXlUuJCc6hOpmeadmk0qUSO1IamDwm+kikCzAZa /DjY8oP2X9324F73nnN94klp3N1EcgKe6yPbVeFr9lD9DIm0Ujsxp+PeMTmruT7p80qvs2QaN Z0Ft25Ig3kN9N4zQOEroP1XFsbTi14yEEG5lzXyf4N55kKcBzxpio8Ne3UMe9ioa1gi+FPHfl WxXpnaCgBTNF4+5WG+myev4DMhtPDaesZISnjpR9D5I31LBU27dClKplFePRIraVCKjdkCxM4 kAEZYBIqk6N+MyAf Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wednesday 04 November 2015 10:46:49 Daniel Lezcano wrote: > On 11/03/2015 03:28 PM, Jisheng Zhang wrote: > > In case there are several possible delay timers, we purely base the > > selection on the frequency, which is suboptimal in some cases. Take > > one Marvell Berlin platform for example: we have arch timer and dw-apb > > timer. The arch timer freq is 25MHZ while the dw-apb timer freq is > > 100MHZ, current selection would choose the dw-apb timer. But the dw > > apb timer is on the APB bus while arch timer sits in CPU, the cost > > of accessing the apb timer is higher than the arch timer. > > > > This series firstly modifies register_current_timer_delay() to choose > > the highest rating delay timer: use the rating as a primary indication > > and fall back to comparing the frequency if the rating is not set or > > the same. Then we set the arch_delay_timer rating as 400, finally > > Implement ARM delay timer for the dw_apb_timer and set its rating as 300. > > Hi Jisheng, Arnd, > > I don't feel comfortable with the rating / freq think. I am afraid this > approach based on heuristic will bring a lot of complexity and > workarounds in the code for a small benefit. > > Why don't we define a DT entry for the delay timer ? So we delegate the > choice to the platform DT definition. That would be wrong, because the fact that Linux uses a timer to optimize its udelay() function is not a feature of the hardware. Arnd