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From: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Will Deacon <will@kernel.org>, <rostedt@goodmis.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	<quic_psodagud@quicinc.com>, <gregkh@linuxfoundation.org>,
	<arnd@arndb.de>, <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>,
	<mingo@redhat.com>, Prasad Sodagudi <psodagud@codeaurora.org>
Subject: Re: [PATCHv4 1/2] tracing: Add register read/write tracing support
Date: Fri, 19 Nov 2021 20:49:53 +0530	[thread overview]
Message-ID: <440b7e8b-a15b-c394-9797-65226717b1d4@quicinc.com> (raw)
In-Reply-To: <878rxk6xhg.wl-maz@kernel.org>

On 11/19/2021 7:47 PM, Marc Zyngier wrote:
> On Fri, 19 Nov 2021 14:07:09 +0000,
> Sai Prakash Ranjan <quic_saipraka@quicinc.com> wrote:
>> On 11/19/2021 7:13 PM, Marc Zyngier wrote:
>>> On Mon, 15 Nov 2021 11:33:29 +0000,
>>> Sai Prakash Ranjan <quic_saipraka@quicinc.com> wrote:
>>>> From: Prasad Sodagudi <psodagud@codeaurora.org>
>>>>
> [...]
>
>>>> Reason why we wouldn't need value along with mmio write log is
>>>> that value can be easily deduced from the caller_name+offset which is
>>>> printed already by the rwmmio trace events which gives the exact
>>>> location of mmio writes and the value is easily known from the driver.
>>> That's a very narrow view of what can be written in an MMIO
>>> registers. We write dynamic values at all times, and if we are able to
>>> trace MMIO writes, then the value written out must be part of the trace.
>>>
>>> I'd rather you try and get to the bottom of this issue rather than
>>> paper over it.
>>>
>>> Thanks,
>>>
>>> 	M.
>>>
>> Sure, idea was to put it out in the open if anyone has any idea as
>> to what might be happening there since the version where directly
>> instrumenting the raw read/write accessors in arm64/asm/io.h was
>> working fine casting doubts if this has to do something with
>> inlining as Arnd mentioned before.
> Yup. I wouldn't be surprised if MMIO accessors were getting directly
> inlined at the wrong location and creating havoc. For example:
>
> 	writel(readl(addr1) | 1, addr2);
>
> If you're not careful about capturing the result of the read rather
> than the read itself, you can end-up with something really funky. No
> idea if that's what is happening, but a disassembly of the generated
> code could tell you.
>
> 	M.
>

I did that initially (compare the disassembly in working and non-working 
case) but didn't find
anything noticeable, maybe I need to look some more. Thanks for the 
suggestion.

Thanks,
Sai

  reply	other threads:[~2021-11-19 15:20 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-15 11:33 [PATCHv4 0/2] tracing/rwmmio/arm64: Add support to trace register reads/writes Sai Prakash Ranjan
2021-11-15 11:33 ` [PATCHv4 1/2] tracing: Add register read/write tracing support Sai Prakash Ranjan
2021-11-19 13:43   ` Marc Zyngier
2021-11-19 14:07     ` Sai Prakash Ranjan
2021-11-19 14:17       ` Marc Zyngier
2021-11-19 15:19         ` Sai Prakash Ranjan [this message]
2021-11-15 11:33 ` [PATCHv4 2/2] arm64/io: Add a header for mmio access instrumentation Sai Prakash Ranjan
2021-11-16 22:40   ` Steven Rostedt
2021-11-17  3:53     ` Sai Prakash Ranjan
2021-11-18 14:58   ` kernel test robot
2021-11-18 15:24   ` Arnd Bergmann
2021-11-19  4:06     ` Sai Prakash Ranjan
2021-11-22 13:35       ` Sai Prakash Ranjan
2021-11-22 13:59         ` Arnd Bergmann
2021-11-22 14:19           ` Sai Prakash Ranjan
2021-11-22 14:30             ` Arnd Bergmann
2021-11-22 14:59               ` Sai Prakash Ranjan
2021-11-22 15:35                 ` Arnd Bergmann
2021-11-22 15:43                   ` Sai Prakash Ranjan
2021-11-29 13:49                     ` Sai Prakash Ranjan
2021-11-19 13:48   ` Marc Zyngier
2021-11-19 14:09     ` Sai Prakash Ranjan

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