From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934129AbcLUDiU (ORCPT ); Tue, 20 Dec 2016 22:38:20 -0500 Received: from mail-wm0-f66.google.com ([74.125.82.66]:35508 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752700AbcLUDiS (ORCPT ); Tue, 20 Dec 2016 22:38:18 -0500 Subject: Re: [PATCH] mtd: spi-nor: add support for ESMT_f25l32qa and ESMT_f25l64qa To: John Crispin , Cyrille Pitchen References: <1482266481-20700-1-git-send-email-john@phrozen.org> Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, "Larry D. Pinney" From: Marek Vasut Message-ID: <4500be8e-56fe-5435-3f5a-cd7f20d1112e@gmail.com> Date: Wed, 21 Dec 2016 04:37:14 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Icedove/45.4.0 MIME-Version: 1.0 In-Reply-To: <1482266481-20700-1-git-send-email-john@phrozen.org> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12/20/2016 09:41 PM, John Crispin wrote: > From: "Larry D. Pinney" > > Add Support for the ESMT_F25L32QA and ESMT_F25L64QA > These are 4MB and 8MB SPI NOR Chips from Elite Semiconductor Memory > Technology > > Signed-off-by: John Crispin > Signed-off-by: Larry D. Pinney It looks OK: Acked-by: Marek Vasut > --- > Sorry, forgot to add this to the series I sent earlier > > drivers/mtd/spi-nor/spi-nor.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c > index f9a41dc..ac4155d 100644 > --- a/drivers/mtd/spi-nor/spi-nor.c > +++ b/drivers/mtd/spi-nor/spi-nor.c > @@ -821,6 +821,8 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len) > > /* ESMT */ > { "f25l32pa", INFO(0x8c2016, 0, 64 * 1024, 64, SECT_4K) }, > + { "f25l32qa", INFO(0x8c4116, 0, 64 * 1024, 64, SECT_4K) }, > + { "f25l64qa", INFO(0x8c4117, 0, 64 * 1024, 128, SECT_4K) }, > > /* Everspin */ > { "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, > -- Best regards, Marek Vasut