From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754987AbcE0Onw (ORCPT ); Fri, 27 May 2016 10:43:52 -0400 Received: from mail-lf0-f67.google.com ([209.85.215.67]:35247 "EHLO mail-lf0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752454AbcE0Onu (ORCPT ); Fri, 27 May 2016 10:43:50 -0400 Subject: Re: [PATCH] soc/tegra: pmc: Fix "scheduling while atomic" To: Jon Hunter References: <1460900051-3065-1-git-send-email-digetx@gmail.com> <572B47DE.1090804@nvidia.com> <5745C02A.20308@nvidia.com> <5746B6F7.9040101@nvidia.com> <574708E8.3060308@nvidia.com> <574715D7.4060004@nvidia.com> <6bfd97bc-7e09-973d-e3c3-7e86b08a4550@gmail.com> <574841AD.8090601@nvidia.com> Cc: Stephen Warren , Thierry Reding , Alexandre Courbot , Peter De Schrijver , Prashant Gaikwad , linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org From: Dmitry Osipenko Message-ID: <450c48c1-cc59-1c1a-567e-14f03840880f@gmail.com> Date: Fri, 27 May 2016 17:43:45 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.1.0 MIME-Version: 1.0 In-Reply-To: <574841AD.8090601@nvidia.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 27.05.2016 15:46, Jon Hunter wrote: > > On 26/05/16 18:01, Dmitry Osipenko wrote: >> On 26.05.2016 18:27, Jon Hunter wrote: >>> On 26/05/16 15:57, Dmitry Osipenko wrote: > > ... > >>>> That's how I see it: >>>> >>>> +----------------------------------------------+ >>>> | CPU 0 | >>>> +-------------------+--------------------------+ >>>> | Idle thread | Interactive gov. thread | >>>> +----------------------------------------------+ >>>> | inactive | | >>>> | | | >>>> | | CPU freq. change | >>>> | | | >>>> | | clk_set_rate() | >>>> | | | >>>> | ... | clk_prepare_lock() | >>>> | | | >>>> | | PRE rate notifier call | >>>> | | | >>>> | | schedule | >>> >>> What is this notifier doing? Is there some sort of hardware activity >>> that it is waiting for to complete? >>> >> >> It changes regulator voltage if required. So at least I2C would cause >> scheduling on wait_for_completion_timeout(). > > Yes, of course that would make sense. What is interesting/odd in this > case is that the frequency is increasing (voltage scaled pre frequency > change) but yet you are entering LP2. May be that is possible? I guess > this problem may also occur on reducing frequency as well? > Sorry, possible what? Surely it might happen on the POST notify, I just used PRE for example. There are no active tasks while CPU changing the frequency, so kernel enters idle mode while waiting for the HW completion - the interrupt. I don't see anything wrong here. > What are you using in the v3.18 kernel for exit_latency and > target_residency? The current mainline has 5000us and 10000us, > respectively. > Default stock latencies, not sure why you are asking. It's essentially a mainline kernel with some added device drivers and android patches. > It does seem that this could be triggered in the right circumstances and > I have to say I don't like the fact that this could be fragile as it is > today. Have you thought about adding a post clock notifier for pclk in > the PMC driver as an alternative to the change you are suggesting? > No, I haven't. Sounds like a good idea, thanks for the suggestion! I'll try it and send V2 if it will be okay, otherwise will report the problem. -- Dmitry