From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751503AbaKDAq5 (ORCPT ); Mon, 3 Nov 2014 19:46:57 -0500 Received: from mga03.intel.com ([134.134.136.65]:31961 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751159AbaKDAqy convert rfc822-to-8bit (ORCPT ); Mon, 3 Nov 2014 19:46:54 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.07,310,1413270000"; d="scan'208";a="601622256" From: "Chen, Alvin" To: "Bryan O'Donoghue" , "Tan, Raymond" , Lee Jones , Samuel Ortiz CC: "linux-kernel@vger.kernel.org" , "Shevchenko, Andriy" Subject: RE: [PATCH 1/1] mfd: intel_quark_i2c_gpio: Add Intel Quark X1000 I2C-GPIO MFD Driver Thread-Topic: [PATCH 1/1] mfd: intel_quark_i2c_gpio: Add Intel Quark X1000 I2C-GPIO MFD Driver Thread-Index: AQHP9zm83r/nWKJ6t0a9/XEnzc824JxOLysAgAFydyA= Date: Tue, 4 Nov 2014 00:46:06 +0000 Message-ID: <4656BEB6164FC34F8171C6538F1A595B2E9AB06D@SHSMSX101.ccr.corp.intel.com> References: <1415000344-23575-1-git-send-email-raymond.tan@intel.com> <1415000344-23575-2-git-send-email-raymond.tan@intel.com> <54575A68.7060009@nexus-software.ie> In-Reply-To: <54575A68.7060009@nexus-software.ie> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > > On 03/11/14 07:39, Raymond Tan wrote: > > + pdata->properties->irq = pdev->irq; > > + pdata->properties->irq_shared = true; > > OK I see it. > > Thanks. > > My question is. How extensively have edge triggered interrupts been tested on > the GPIO block ? > > The BSP reference code is quite explicit about not missing edge interrupts. > > Have you tested GPIO input in edge mode ? We indeed test edge mode. Now all are moved to gpio-dwapb module which has been accepted by maintainer. The BSP code doesn't meet the requirement of upstream, so we totally re-implement this feature in gpio-dwapb. This patch only passes the necessary parameters and registers the platform devices. > > +irqreturn_t intel_qrk_gpio_isr(int irq, void *dev_id) { > + irqreturn_t ret = IRQ_NONE; > + u32 pending = 0, gpio = 0; > + void __iomem *reg_pending = reg_base + PORTA_INT_STATUS; > + void __iomem *reg_eoi = reg_base + PORTA_INT_EOI; > + > + /* Which pin (if any) triggered the interrupt */ > + while ((pending = ioread32(reg_pending))) { > + /* > + * Acknowledge all the asserted GPIO interrupt lines before > + * serving them, so that we don't lose an edge. > + * This has only effect on edge-triggered interrupts. > + */ > + iowrite32(pending, reg_eoi); > + > + /* Serve each asserted interrupt */ > + do { > + gpio = __ffs(pending); > + generic_handle_irq( > + gpio_to_irq(INTEL_QRK_GIP_GPIO_BASE + gpio)); > + pending &= ~BIT(gpio); > + ret = IRQ_HANDLED; > + } while(pending); > + } > + > + return ret; > +}