From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752646AbcGOG4j (ORCPT ); Fri, 15 Jul 2016 02:56:39 -0400 Received: from mout.kundenserver.de ([217.72.192.75]:51350 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751809AbcGOG4h (ORCPT ); Fri, 15 Jul 2016 02:56:37 -0400 From: Arnd Bergmann To: Bharat Kumar Gogada Cc: Lorenzo Pieralisi , "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Bjorn Helgaas , "Liviu.Dudau@arm.com" , nofooter , "thomas.petazzoni@free-electrons.com" , Rongrong Zou , Rongrong Zou , linux-arm-kernel@lists.infradead.org Subject: Re: Purpose of pci_remap_iospace Date: Fri, 15 Jul 2016 08:55:46 +0200 Message-ID: <4711052.Qi2htfK0nU@wuerfel> User-Agent: KMail/5.1.3 (Linux/4.4.0-28-generic; KDE/5.18.0; x86_64; ; ) In-Reply-To: <8520D5D51A55D047800579B094147198258B92E9@XAP-PVEXMBX01.xlnx.xilinx.com> References: <8520D5D51A55D047800579B094147198258B85DC@XAP-PVEXMBX01.xlnx.xilinx.com> <20160714145624.GB30657@red-moon> <8520D5D51A55D047800579B094147198258B92E9@XAP-PVEXMBX01.xlnx.xilinx.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:df8OS909HwZ4F5XY7IvTE3Yf2uH0nAzLgchFxVdO61Q+R8MULGf TzcAM75EBp8bhN/cDzWiHDnGWtVG50R1fkp8AjxuRXlcAlKxdmKhZpA5HMUCZPwJ44/giIs btHbcJDFUIqGUI9pmifoTc42z32FSHUKxUqB7JyY1oPXaUUIulV+eJ8+khC42tnDCVeMaif gjhlTrL5BctmU14WfGQjw== X-UI-Out-Filterresults: notjunk:1;V01:K0:MIF7S6cCrbI=:2BGw2JlhzjMGdAIsTT693C NrGH75FrGaNbtLGYvbmYKF/oZCIjJlt0ZdlxsNVypZ0sH6AdG7v5QahvjVeT3PRj6mjFFBwEv AqBGDnghYCNR5ev/3Wx39JM362a1P5VmmGY+fSzdthB3abiobPcBM85J0S5vu+jVEnDCWdFrS mq7evqLlp5yPf2TSi0vqGWEzPh7yyN7RwHUclqF3LkxxWWiGtqoa3tbBRwOVDyWMdh50SdZgF 7lzYesy4vMvrzKAL0sWpJwEavzQXo6u3YCwIFhleDta0mSBl01sMDR0JfBIdbqo5ZJUGa9NSe XoDfQQGrybxr1ss/ooIMJqvEP3B8ASTuxQ0W3M52M7iaN0XF0PWxK21ZACsPnGbO5xAlckf4b nzo3hicGgSHrCyNw2fzZjKj8s7lxN0Czafy6Tcht8AVKc+4NORsgIQ1TE32KG0sQjiSIChLqS cK4Z34qi0jM6B//os3+7WZAjBrtpEzcPm66TnLfDwHshJE8dpgEi3lIlaZf10J9VHOeGGZdCS PvVczSxWUmR93WkGZL0I+yqb7nFHdoGe6GFmqeb6EskU2n5co9L7ICCvppcj9oQga0jQ0owUy igN8MoI4wok/aawzNrMS4/Lod/LEWoCKbImqenRst7NsIWN29kO3JSH8N3+VFsrGiPa7QXRDy 0CTIiCzKtp9dkvIc4JdwsKZkb7mgriswK18OE9Bp0BtAQ+pRro/rSgMlDwLQSSMq+xoy9KC9R 55FwN9+osVcNIJ1t Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Friday, July 15, 2016 5:21:20 AM CEST Bharat Kumar Gogada wrote: > > On Thu, Jul 14, 2016 at 01:32:13PM +0000, Bharat Kumar Gogada wrote: > > > > [...] > > > > > Hi Lorenzo, > > > > > > I missed something in my device tree now I corrected it. > > > > > > ranges = <0x01000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0 > > 0x00010000 //io > > > > You have not missed anything, you changed the PCI bus address at which > > your host bridge responds to IO space and it must match your configuration. > > At what PCI bus address your host bridge maps IO space ? > > > Our host bridge does not have dedicted address space mapped for IO transactions. > For generation of IO transactions it requires some register read and write operations > in bridge logic. > > So the above PCI address does not come in to picture also, is there alternate way to handle IO > Bars with our kind of hardware architecture. Hisilicon has a similar thing on one of their LPC bridges, and Rongrong Zou has implemented something for it in the past, but I think it never got merged. https://lkml.org/lkml/2015/12/29/154 has one version of his proposal, not sure if that was the latest one or if something newer exists. Arnd