From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87697C433E0 for ; Thu, 4 Mar 2021 19:35:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 40FAB64F69 for ; Thu, 4 Mar 2021 19:35:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232729AbhCDTfQ (ORCPT ); Thu, 4 Mar 2021 14:35:16 -0500 Received: from mga14.intel.com ([192.55.52.115]:14203 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231827AbhCDTfG (ORCPT ); Thu, 4 Mar 2021 14:35:06 -0500 IronPort-SDR: tnMbW7JWeGCkTOv3+kJUsslwGkD1R22z7JgLuin9PuUzb9alhaTdbu3NAjzK9Z11+WRHc2nAln 7jrXxaFulYzA== X-IronPort-AV: E=McAfee;i="6000,8403,9913"; a="186842212" X-IronPort-AV: E=Sophos;i="5.81,223,1610438400"; d="scan'208";a="186842212" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Mar 2021 11:33:20 -0800 IronPort-SDR: JviQkSzYEuA6/b+ZnYdrqMsQXla0p5WcLi7AplNp1NtmclUWiHTNgCzm8dYK8yY3WkMPGXSzBO Z8gvROMo81uA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,223,1610438400"; d="scan'208";a="597026979" Received: from linux.intel.com ([10.54.29.200]) by fmsmga006.fm.intel.com with ESMTP; 04 Mar 2021 11:33:20 -0800 Received: from [10.252.141.30] (kliang2-MOBL.ccr.corp.intel.com [10.252.141.30]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by linux.intel.com (Postfix) with ESMTPS id 388105808B1; Thu, 4 Mar 2021 11:33:19 -0800 (PST) Subject: Re: [perf] perf_fuzzer causes unchecked MSR access error To: Vince Weaver Cc: Stephane Eranian , LKML , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim References: <61a56699-aab4-ef6-ed8d-a22b6bf532d@maine.edu> <7170d3b-c17f-1ded-52aa-cc6d9ae999f4@maine.edu> <32888c33-c286-c600-66cb-8b1b03beeb8b@linux.intel.com> <6c1f8e-f81-a781-e594-368e7adef0c0@maine.edu> <9df5f72d-a959-fe46-400a-7dca6c596478@linux.intel.com> From: "Liang, Kan" Message-ID: <473aff30-5e4f-394f-1c75-9bae66e37bbc@linux.intel.com> Date: Thu, 4 Mar 2021 14:33:17 -0500 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 3/3/2021 3:22 PM, Vince Weaver wrote: > On Wed, 3 Mar 2021, Liang, Kan wrote: > >> We never use bit 58. It should be a new issue. Actually, KVM uses it. They create a fake event called VLBR_EVENT, which uses bit 58. It's introduced from the commit 097e4311cda9 ("perf/x86: Add constraint to create guest LBR event without hw counter"). Since it's a fake event, it doesn't support PEBS. Perf should reject it if it sets the precise_ip. The below patch should fix the MSR access error. diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 5bac48d..1ea3c67 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -3659,6 +3659,10 @@ static int intel_pmu_hw_config(struct perf_event *event) return ret; if (event->attr.precise_ip) { + + if ((event->attr.config & INTEL_ARCH_EVENT_MASK) == INTEL_FIXED_VLBR_EVENT) + return -EINVAL; + if (!(event->attr.freq || (event->attr.wakeup_events && !event->attr.watermark))) { event->hw.flags |= PERF_X86_EVENT_AUTO_RELOAD; if (!(event->attr.sample_type & Thanks, Kan