From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758283AbXLOWsb (ORCPT ); Sat, 15 Dec 2007 17:48:31 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1754633AbXLOWsX (ORCPT ); Sat, 15 Dec 2007 17:48:23 -0500 Received: from terminus.zytor.com ([198.137.202.10]:48326 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753195AbXLOWsX (ORCPT ); Sat, 15 Dec 2007 17:48:23 -0500 Message-ID: <47645963.9060202@zytor.com> Date: Sat, 15 Dec 2007 14:46:59 -0800 From: "H. Peter Anvin" User-Agent: Thunderbird 2.0.0.9 (X11/20071115) MIME-Version: 1.0 To: Allen Martin CC: Alan Cox , Rene Herman , "David P. Reed" , Pavel Machek , Andi Kleen , "linux-os (Dick Johnson)" , David Newall , Paul Rolland , Krzysztof Halasa , linux-kernel@vger.kernel.org, Thomas Gleixner , Ingo Molnar , rol@witbe.net Subject: Re: More info on port 80 symptoms on MCP51 machine. References: <475DE6F4.80702@zytor.com> <475DEB23.1000304@davidnewall.com> <20071211084059.3d03e11d@tux.DEF.witbe.net> <475E5D4B.8020101@keyaccess.nl> <475E7DC2.4060509@davidnewall.com> <475E8D91.20201@keyaccess.nl> <475E95A3.3070801@davidnewall.com> <20071211163017.GD16750@one.firstfloor.org> <475EBFBA.6090301@keyaccess.nl> <20071211191649.GB3437@elf.ucw.cz> <475EEC75.80609@keyaccess.nl> <47603F66.3070108@reed.com> <476043DA.5000602@keyaccess.nl> <47604B71.7090902@keyaccess.nl> <20071212210143.48721a41@the-village.bc.nu> <47604EA4.50504@zytor.com> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Allen Martin wrote: > > Nothing inside the chipset should be decoding port 80 writes. It's > possible this board has a port 80 decoder wired onto the board that's > misbehaving. I've seen other laptop boards with port 80 decoders > wired onto the board, even if the 7 segment display is only populated > on debug builds. > > We use PCI port 80 decoders internally for debugging quite often, so > if there were some chipset issue related to port 80 it would have > showed up a long time ago, and this is the first I've heard of > hangs related to port 80 writes. > Presumably you have programmable decoders to trigger SMI? If not, then they're probably doing the equivalent in a SuperIO chip or similar. -hpa