From: "Bae, Chang Seok" <chang.seok.bae@intel.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: "bp@suse.de" <bp@suse.de>, "Lutomirski, Andy" <luto@kernel.org>,
"mingo@kernel.org" <mingo@kernel.org>,
"x86@kernel.org" <x86@kernel.org>,
"Brown, Len" <len.brown@intel.com>,
"lenb@kernel.org" <lenb@kernel.org>,
"Hansen, Dave" <dave.hansen@intel.com>,
"Macieira, Thiago" <thiago.macieira@intel.com>,
"Liu, Jing2" <jing2.liu@intel.com>,
"Shankar, Ravi V" <ravi.v.shankar@intel.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v10 13/28] x86/fpu/xstate: Use feature disable (XFD) to protect dynamic user state
Date: Sun, 3 Oct 2021 22:41:45 +0000 [thread overview]
Message-ID: <47D6E3AB-A3B6-4604-89A4-EBEF1F3AB026@intel.com> (raw)
In-Reply-To: <871r546b52.ffs@tglx>
On Oct 1, 2021, at 08:02, Thomas Gleixner <tglx@linutronix.de> wrote:
> On Wed, Aug 25 2021 at 08:53, Chang S. Bae wrote:
>> +/**
>> + * xfd_switch - Switches the MSR IA32_XFD context if needed.
>> + * @prev: The previous task's struct fpu pointer
>> + * @next: The next task's struct fpu pointer
>> + */
>> +static inline void xfd_switch(struct fpu *prev, struct fpu *next)
>> +{
>> + u64 prev_xfd_mask, next_xfd_mask;
>> +
>> + if (!cpu_feature_enabled(X86_FEATURE_XFD) || !xfeatures_mask_user_dynamic)
>> + return;
>
> This is context switch, so this wants to be a static key which is turned
> on during init when the CPU supports XFD and user dynamic features are
> available.
Replied in the later email [1].
>> +
>> + prev_xfd_mask = prev->state_mask & xfeatures_mask_user_dynamic;
>> + next_xfd_mask = next->state_mask & xfeatures_mask_user_dynamic;
>> +
>> + if (unlikely(prev_xfd_mask != next_xfd_mask))
>> + wrmsrl_safe(MSR_IA32_XFD, xfeatures_mask_user_dynamic ^ next_xfd_mask);
>> +}
>> +
>> /*
>> * Delay loading of the complete FPU state until the return to userland.
>> * PKRU is handled separately.
>> */
>> -static inline void switch_fpu_finish(struct fpu *new_fpu)
>> +static inline void switch_fpu_finish(struct fpu *old_fpu, struct fpu *new_fpu)
>> {
>> - if (cpu_feature_enabled(X86_FEATURE_FPU))
>> + if (cpu_feature_enabled(X86_FEATURE_FPU)) {
>> set_thread_flag(TIF_NEED_FPU_LOAD);
>> + xfd_switch(old_fpu, new_fpu);
>
> Why has this to be done on context switch? Zero explanation provided.
>
> Why can't this be done in exit_to_user() where the FPU state restore is
> handled?
Replied in the later email [1].
>> }
>> +
>> + if (boot_cpu_has(X86_FEATURE_XFD))
>
> s/boot_cpu_has/cpu_feature_enabled/g
I think this is under fpu__init_cpu_xstate(). IIRC, here cpu_feature_enabled()
had caused a build error before. Now it looks okay. Will update.
>> + wrmsrl(MSR_IA32_XFD, xfeatures_mask_user_dynamic);
>> }
>> +
>> + if (cpu_feature_enabled(X86_FEATURE_XFD))
>> + wrmsrl_safe(MSR_IA32_XFD, (current->thread.fpu.state_mask &
>> + xfeatures_mask_user_dynamic) ^
>> + xfeatures_mask_user_dynamic);
>
> Lacks curly braces as it's not a single line of code.
Sorry, I was confused with other examples like this in the mainline. Will fix.
>> }
>>
>> /**
>> diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
>> index 33f5d8d07367..6cd4fb098f8f 100644
>> --- a/arch/x86/kernel/process.c
>> +++ b/arch/x86/kernel/process.c
>> @@ -97,6 +97,16 @@ void arch_thread_struct_whitelist(unsigned long *offset, unsigned long *size)
>> *size = fpu_buf_cfg.min_size;
>> }
>>
>> +void arch_release_task_struct(struct task_struct *task)
>> +{
>> + if (!cpu_feature_enabled(X86_FEATURE_FPU))
>> + return;
>> +
>> + /* Free up only the dynamically-allocated memory. */
>> + if (task->thread.fpu.state != &task->thread.fpu.__default_state)
>
> Sigh.
Yeah, I will fix it this time. I also responded about the reason for doing
this in the other mail [2].
>> + free_xstate_buffer(&task->thread.fpu);
>>
>> +static __always_inline bool handle_xfd_event(struct fpu *fpu, struct pt_regs *regs)
>> +{
>> + bool handled = false;
>> + u64 xfd_err;
>> +
>> + if (!cpu_feature_enabled(X86_FEATURE_XFD))
>> + return handled;
>> +
>> + rdmsrl_safe(MSR_IA32_XFD_ERR, &xfd_err);
>> + wrmsrl_safe(MSR_IA32_XFD_ERR, 0);
>> +
>> + if (xfd_err) {
>
> What's wrong with
>
> if (!xfd_err)
> return false;
>
> an spare the full indentation levels below
I thought local variables under this. But yes, this can save an indentation
level here.
>> + u64 xfd_event = xfd_err & xfeatures_mask_user_dynamic;
>> + u64 value;
>> +
>> + if (WARN_ON(!xfd_event)) {
>> + /*
>> + * Unexpected event is raised. But update XFD state to
>> + * unblock the task.
>> + */
>> + rdmsrl_safe(MSR_IA32_XFD, &value);
>> + wrmsrl_safe(MSR_IA32_XFD, value & ~xfd_err);
>
> Ditto. But returning false here will not unblock the task as
> exc_device_not_available() will simply reach "die()".
Yes, it is. But this "unexpected #NM exception” could make confusion as an #NM
is XFD-induced and that needs to be differentiated for users. (Len made this
point to me.)
>> + } else {
>> + struct fpu *fpu = ¤t->thread.fpu;
>
> You need this because the fpu argument above is invalid?
Ah, so sorry, I should have removed this line when I refactor this function..
>> + int err = -1;
>> +
>> + /*
>> + * Make sure not in interrupt context as handling a
>> + * trap from userspace.
>> + */
>> + if (!WARN_ON(in_interrupt())) {
>
> Why would in_interrupt() be necessarily true when the trap comes from
> kernel space? The proper check is user_mode(regs) as done anywhere else.
I see.
>> + err = realloc_xstate_buffer(fpu, xfd_event);
>> + if (!err)
>> + wrmsrl_safe(MSR_IA32_XFD, (fpu->state_mask &
>> + xfeatures_mask_user_dynamic) ^
>> + xfeatures_mask_user_dynamic);
>> + }
>> +
>> + /* Raise a signal when it failed to handle. */
>> + if (err)
>> + force_sig_fault(SIGILL, ILL_ILLOPC, error_get_trap_addr(regs));
>> + }
>> + handled = true;
>> + }
>> + return handled;
>> +}
>> +
>> DEFINE_IDTENTRY(exc_device_not_available)
>> {
>> unsigned long cr0 = read_cr0();
>
>> + if (handle_xfd_event(¤t->thread.fpu, regs))
>> + return;
>
> As I said before, this is wrong because at that point interrupts are disabled.
I saw you suggested the code. Will take that, thanks.
Thanks,
Chang
[1] https://lore.kernel.org/lkml/66A19E8A-11BF-4532-878F-A8D0935FDBC7@intel.com/
[2] https://lore.kernel.org/lkml/CAF9A956-5623-4D24-BA3E-AF139C0A7CE6@intel.com/
next prev parent reply other threads:[~2021-10-03 22:41 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-25 15:53 [PATCH v10 00/28] x86: Support Intel Advanced Matrix Extensions Chang S. Bae
2021-08-25 15:53 ` [PATCH v10 01/28] x86/fpu/xstate: Fix the state copy function to the XSTATE buffer Chang S. Bae
2021-10-01 12:44 ` Thomas Gleixner
2021-10-03 22:34 ` Bae, Chang Seok
2021-08-25 15:53 ` [PATCH v10 02/28] x86/fpu/xstate: Modify the initialization helper to handle both static and dynamic buffers Chang S. Bae
2021-10-01 12:45 ` Thomas Gleixner
2021-10-03 22:35 ` Bae, Chang Seok
2021-08-25 15:53 ` [PATCH v10 03/28] x86/fpu/xstate: Modify state copy helpers " Chang S. Bae
2021-10-01 12:47 ` Thomas Gleixner
2021-10-03 22:42 ` Bae, Chang Seok
2021-08-25 15:53 ` [PATCH v10 04/28] x86/fpu/xstate: Modify address finders " Chang S. Bae
2021-10-01 13:15 ` Thomas Gleixner
2021-10-03 22:35 ` Bae, Chang Seok
2021-10-04 12:54 ` Thomas Gleixner
2021-08-25 15:53 ` [PATCH v10 05/28] x86/fpu/xstate: Add a new variable to indicate dynamic user states Chang S. Bae
2021-10-01 13:16 ` Thomas Gleixner
2021-10-03 22:35 ` Bae, Chang Seok
2021-10-04 12:57 ` Thomas Gleixner
2021-08-25 15:53 ` [PATCH v10 06/28] x86/fpu/xstate: Add new variables to indicate dynamic XSTATE buffer size Chang S. Bae
2021-10-01 13:32 ` Thomas Gleixner
2021-10-03 22:36 ` Bae, Chang Seok
2021-08-25 15:53 ` [PATCH v10 07/28] x86/fpu/xstate: Calculate and remember dynamic XSTATE buffer sizes Chang S. Bae
2021-08-25 15:53 ` [PATCH v10 08/28] x86/fpu/xstate: Convert the struct fpu 'state' field to a pointer Chang S. Bae
2021-08-25 15:53 ` [PATCH v10 09/28] x86/fpu/xstate: Introduce helpers to manage the XSTATE buffer dynamically Chang S. Bae
2021-10-01 14:20 ` Thomas Gleixner
2021-10-03 22:36 ` Bae, Chang Seok
2021-08-25 15:53 ` [PATCH v10 10/28] x86/fpu/xstate: Update the XSTATE save function to support dynamic states Chang S. Bae
2021-10-01 15:41 ` Thomas Gleixner
2021-10-02 21:31 ` Thomas Gleixner
2021-10-02 22:54 ` Bae, Chang Seok
2021-10-05 8:16 ` Paolo Bonzini
2021-10-05 7:50 ` Paolo Bonzini
2021-10-05 9:55 ` Thomas Gleixner
2021-08-25 15:53 ` [PATCH v10 11/28] x86/fpu/xstate: Update the XSTATE buffer address finder " Chang S. Bae
2021-08-25 15:53 ` [PATCH v10 12/28] x86/fpu/xstate: Update the XSTATE context copy function " Chang S. Bae
2021-08-25 15:53 ` [PATCH v10 13/28] x86/fpu/xstate: Use feature disable (XFD) to protect dynamic user state Chang S. Bae
2021-10-01 15:02 ` Thomas Gleixner
2021-10-01 15:10 ` Thomas Gleixner
2021-10-03 22:38 ` Bae, Chang Seok
2021-10-04 12:35 ` Thomas Gleixner
2021-10-01 20:20 ` Thomas Gleixner
2021-10-03 22:39 ` Bae, Chang Seok
2021-10-04 19:03 ` Thomas Gleixner
2021-10-03 22:41 ` Bae, Chang Seok [this message]
2021-08-25 15:53 ` [PATCH v10 14/28] x86/fpu/xstate: Support ptracer-induced XSTATE buffer expansion Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 15/28] x86/arch_prctl: Create ARCH_SET_STATE_ENABLE/ARCH_GET_STATE_ENABLE Chang S. Bae
2021-08-25 16:36 ` Bae, Chang Seok
2021-08-25 15:54 ` [PATCH v10 16/28] x86/fpu/xstate: Support both legacy and expanded signal XSTATE size Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 17/28] x86/fpu/xstate: Adjust the XSAVE feature table to address gaps in state component numbers Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 18/28] x86/fpu/xstate: Disable XSTATE support if an inconsistent state is detected Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 19/28] x86/cpufeatures/amx: Enumerate Advanced Matrix Extension (AMX) feature bits Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 20/28] x86/fpu/amx: Define AMX state components and have it used for boot-time checks Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 21/28] x86/fpu/amx: Initialize child's AMX state Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 22/28] x86/fpu/amx: Enable the AMX feature in 64-bit mode Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 23/28] x86/fpu/xstate: Skip writing zeros to signal frame for dynamic user states if in INIT-state Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 24/28] selftest/x86/amx: Test cases for the AMX state management Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 25/28] x86/insn/amx: Add TILERELEASE instruction to the opcode map Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 26/28] intel_idle/amx: Add SPR support with XTILEDATA capability Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 27/28] x86/fpu/xstate: Add a sanity check for XFD state when saving XSTATE Chang S. Bae
2021-08-25 15:54 ` [PATCH v10 28/28] x86/arch_prctl: ARCH_GET_FEATURES_WITH_KERNEL_ASSISTANCE Chang S. Bae
2021-09-30 21:12 ` [PATCH v10 00/28] x86: Support Intel Advanced Matrix Extensions Len Brown
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