From: Xingyu Chen <xingyu.chen@amlogic.com>
To: Neil Armstrong <narmstrong@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Marc Zyngier <marc.zyngier@arm.com>,
Jason Cooper <jason@lakedaemon.net>,
Thomas Gleixner <tglx@linutronix.de>,
Kevin Hilman <khilman@baylibre.com>
Cc: Rob Herring <robh@kernel.org>,
Jianxin Pan <jianxin.pan@amlogic.com>,
<linux-kernel@vger.kernel.org>, Carlo Caione <carlo@caione.org>,
<linux-amlogic@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
Heiner Kallweit <hkallweit1@gmail.com>
Subject: Re: [PATCH 2/2] irqchip/meson-gpio: Add support for Meson-G12A SoC
Date: Tue, 4 Dec 2018 09:51:28 +0800 [thread overview]
Message-ID: <47b58f29-7424-63f4-44fe-0f99a4756862@amlogic.com> (raw)
In-Reply-To: <4fc0694c-4c00-5abd-5336-ef85ad36d9b5@baylibre.com>
On 2018/12/3 18:06, Neil Armstrong wrote:
> On 03/12/2018 10:28, Xingyu Chen wrote:
>>
>>
>> On 2018/12/3 17:19, Jerome Brunet wrote:
>>> On Mon, 2018-12-03 at 14:13 +0800, Xingyu Chen wrote:
>>>> The Meson-G12A SoC uses the same GPIO interrupt controller IP block as the
>>>> other Meson SoCs, A totle of 100 pins can be spied on, which is the sum of:
>>>>
>>>> - 223:100 undefined (no interrupt)
>>>> - 99:97 3 pins on bank GPIOE
>>>> - 96:77 20 pins on bank GPIOX
>>>> - 76:61 16 pins on bank GPIOA
>>>> - 60:53 8 pins on bank GPIOC
>>>> - 52:37 16 pins on bank BOOT
>>>> - 36:28 9 pins on bank GPIOH
>>>> - 27:12 16 pins on bank GPIOZ
>>>> - 11:0 12 pins in the AO domain
>>>>
>>>> Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
>>>> Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
>>>> ---
>>>> drivers/irqchip/irq-meson-gpio.c | 5 +++++
>>>> 1 file changed, 5 insertions(+)
>>>>
>>>> diff --git a/drivers/irqchip/irq-meson-gpio.c b/drivers/irqchip/irq-meson-
>>>> gpio.c
>>>> index 7b531fd075b8..971e8dea069a 100644
>>>> --- a/drivers/irqchip/irq-meson-gpio.c
>>>> +++ b/drivers/irqchip/irq-meson-gpio.c
>>>> @@ -67,12 +67,17 @@ static const struct meson_gpio_irq_params axg_params = {
>>>> .nr_hwirq = 100,
>>>> };
>>>> +static const struct meson_gpio_irq_params g12a_params = {
>>>> + .nr_hwirq = 100,
>>>> +};
>>>> +
>>>
>>> Same comment as on i2c, the g12 seems compatible with the axg.
>>> Is this patchset patchset really necessary ?
>>>
>> Although the total number of pins is the same as the Meson-AXG SoC, the gpio banks and irq numbers are different. To avoid confusion on use, i think the new compatible string is needed.
>
> OK for the new compatible, but you can re-use the same struct like for i2c.
>
> Neil
>
Thanks for your comment, I will fix it in the next version.
>>>> static const struct of_device_id meson_irq_gpio_matches[] = {
>>>> { .compatible = "amlogic,meson8-gpio-intc", .data = &meson8_params },
>>>> { .compatible = "amlogic,meson8b-gpio-intc", .data = &meson8b_params
>>>> },
>>>> { .compatible = "amlogic,meson-gxbb-gpio-intc", .data = &gxbb_params
>>>> },
>>>> { .compatible = "amlogic,meson-gxl-gpio-intc", .data = &gxl_params },
>>>> { .compatible = "amlogic,meson-axg-gpio-intc", .data = &axg_params },
>>>> + { .compatible = "amlogic,meson-g12a-gpio-intc", .data = &g12a_params
>>>> },
>>>> { }
>>>> };
>>>>
>>>
>>>
>>> .
>>>
>>
>> _______________________________________________
>> linux-amlogic mailing list
>> linux-amlogic@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-amlogic
>
> .
>
prev parent reply other threads:[~2018-12-04 1:51 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-03 6:13 [PATCH 0/2] irqchip/meson-gpio: Add support for Meson-G12A SoC Xingyu Chen
2018-12-03 6:13 ` [PATCH 1/2] dt-bindings: interrupt-controller: New binding " Xingyu Chen
2018-12-19 14:21 ` Rob Herring
2018-12-03 6:13 ` [PATCH 2/2] irqchip/meson-gpio: Add support " Xingyu Chen
2018-12-03 9:19 ` Jerome Brunet
2018-12-03 9:28 ` Xingyu Chen
2018-12-03 10:06 ` Neil Armstrong
2018-12-04 1:51 ` Xingyu Chen [this message]
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