From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB600C433F5 for ; Fri, 7 Oct 2022 09:18:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229547AbiJGJSy (ORCPT ); Fri, 7 Oct 2022 05:18:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42910 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229459AbiJGJSw (ORCPT ); Fri, 7 Oct 2022 05:18:52 -0400 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB7796C972 for ; Fri, 7 Oct 2022 02:18:49 -0700 (PDT) Received: from ip5b412258.dynamic.kabel-deutschland.de ([91.65.34.88] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1ogjVF-000618-UU; Fri, 07 Oct 2022 11:18:45 +0200 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-riscv@lists.infradead.org Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Jisheng Zhang Subject: Re: [PATCH 1/8] riscv: move riscv_noncoherent_supported() out of ZICBOM probe Date: Fri, 07 Oct 2022 11:18:45 +0200 Message-ID: <4842439.0VBMTVartN@diego> In-Reply-To: <20221006070818.3616-2-jszhang@kernel.org> References: <20221006070818.3616-1-jszhang@kernel.org> <20221006070818.3616-2-jszhang@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Am Donnerstag, 6. Oktober 2022, 09:08:11 CEST schrieb Jisheng Zhang: > It's a bit wired to call riscv_noncoherent_supported() once when > insmod a module. Move the calling out of feature patch func. > > Signed-off-by: Jisheng Zhang > --- > arch/riscv/kernel/cpufeature.c | 7 +------ > arch/riscv/kernel/setup.c | 4 ++++ > 2 files changed, 5 insertions(+), 6 deletions(-) > > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c > index 3b5583db9d80..03611b3ef45e 100644 > --- a/arch/riscv/kernel/cpufeature.c > +++ b/arch/riscv/kernel/cpufeature.c > @@ -272,12 +272,7 @@ static bool __init_or_module cpufeature_probe_zicbom(unsigned int stage) > case RISCV_ALTERNATIVES_EARLY_BOOT: > return false; > default: > - if (riscv_isa_extension_available(NULL, ZICBOM)) { > - riscv_noncoherent_supported(); > - return true; > - } else { > - return false; > - } > + return riscv_isa_extension_available(NULL, ZICBOM); > } > #endif > > diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c > index 2dfc463b86bb..1a055c3f5d9d 100644 > --- a/arch/riscv/kernel/setup.c > +++ b/arch/riscv/kernel/setup.c > @@ -299,6 +299,10 @@ void __init setup_arch(char **cmdline_p) > riscv_init_cbom_blocksize(); > riscv_fill_hwcap(); > apply_boot_alternatives(); > +#ifdef CONFIG_RISCV_DMA_NONCOHERENT > + if (riscv_isa_extension_available(NULL, ZICBOM)) > + riscv_noncoherent_supported(); > +#endif The nice thing about doing this in cpufeature_probe_zicbom is that you keep all the "ifs" in one place, where now you have 2 places that check the existence of the extension. The overhead is one "x = true" setting on each call to _probe() and with this change things are now also handled differently between the main implementation and the deviants. Though I guess, I'll let others do the judgement call on what is the desired way to go ;-) . Heiko