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Tue, 11 Feb 2020 02:40:48 -0800 Received: from [172.30.17.107] by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1j1SyC-00038S-3f; Tue, 11 Feb 2020 02:40:44 -0800 Subject: Re: [PATCH] rtc: zynqmp: Clear alarm interrupt status before interrupt enable To: Alexandre Belloni , Michal Simek Cc: Srinivas Neeli , Alessandro Zummo , Srinivas Goud , Shubhrajyoti Datta , linux-rtc@vger.kernel.org, LKML , linux-arm , git References: <1576155618-7933-1-git-send-email-srinivas.neeli@xilinx.com> <20200211103939.GD3527@piout.net> From: Michal Simek Message-ID: <49ee656d-0d5e-c97f-f77e-04b1f1a187b4@xilinx.com> Date: Tue, 11 Feb 2020 11:40:40 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 MIME-Version: 1.0 In-Reply-To: <20200211103939.GD3527@piout.net> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(4636009)(396003)(346002)(39860400002)(376002)(136003)(199004)(189003)(426003)(54906003)(2616005)(316002)(5660300002)(36756003)(2906002)(110136005)(31686004)(478600001)(4326008)(336012)(356004)(186003)(107886003)(6666004)(26005)(70206006)(70586007)(81156014)(44832011)(81166006)(8676002)(66574012)(31696002)(9786002)(8936002);DIR:OUT;SFP:1101;SCL:1;SRVR:BY5PR02MB6932;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;LANG:en;PTR:unknown-60-83.xilinx.com;A:1;MX:1; X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 5c9c2d2d-3d22-4ce5-992b-08d7aededf25 X-MS-TrafficTypeDiagnostic: BY5PR02MB6932: X-LD-Processed: 657af505-d5df-48d0-8300-c31994686c5c,ExtAddr X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:8273; X-Forefront-PRVS: 0310C78181 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: SO1nD3DWvbgmSK22ZlpwEYWUovxcr1ZA7WWfxj3XsUT59d+zwDDIjlsOKpK8i6dx2BIhynN/nHif8IxkLpNngbix02J+e+LLEnRqMe+eQf/JKYi9GETXDSORFtRLvCxNpNCVWYlrIPj2f2ElNmu3CSRuJ19NamkFyoS8XdtkuWB2k3Xb4aWPAu8WkXFIMLqHoKKSZaFxGfNG9hKme/fteVoD92iCroW6M8mRfzztyhJ2xpS0GMi7LW0htLKSdEou4yZVhWDWLz/tCGv75aY8wUeAXvoP57+Y2JB71Z+cPQxwLGRQfnqfDqXVnRvlhb60lebrqLUkPNOuu14Qm0KzhbzHDqoQDVwSFKTogpwPxeH/S+d3jmtmo1YOV+b86px829StNMT41J8c7+iN9eHt/5lfJgtvPGRnThyMNJq7tajfFTKz9j24jx8ZfXYGw5iB X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Feb 2020 10:40:54.4237 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5c9c2d2d-3d22-4ce5-992b-08d7aededf25 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR02MB6932 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11. 02. 20 11:39, Alexandre Belloni wrote: > On 10/02/2020 12:48:14+0100, Michal Simek wrote: >> Hi, >> >> čt 12. 12. 2019 v 14:01 odesílatel Srinivas Neeli >> napsal: >>> >>> Fix multiple occurring interrupts for alarm interrupt. RTC module doesn't >>> clear the alarm interrupt status bit immediately after the interrupt is >>> triggered.This is due to the sticky nature of the alarm interrupt status >>> register. The alarm interrupt status register can be cleared only after >>> the second counter outruns the set alarm value. To fix multiple spurious >>> interrupts, disable alarm interrupt in the handler and clear the status >>> bit before enabling the alarm interrupt. >>> >>> Fixes: 11143c19eb57 ("rtc: add xilinx zynqmp rtc driver") >>> Signed-off-by: Srinivas Neeli >>> --- >>> drivers/rtc/rtc-zynqmp.c | 29 ++++++++++++++++++++++++----- >>> 1 file changed, 24 insertions(+), 5 deletions(-) >>> >>> diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c >>> index 5786866c09e9..d311e3ef1f21 100644 >>> --- a/drivers/rtc/rtc-zynqmp.c >>> +++ b/drivers/rtc/rtc-zynqmp.c >>> @@ -38,6 +38,8 @@ >>> >>> #define RTC_CALIB_DEF 0x198233 >>> #define RTC_CALIB_MASK 0x1FFFFF >>> +#define RTC_ALRM_MASK BIT(1) >>> +#define RTC_MSEC 1000 >>> >>> struct xlnx_rtc_dev { >>> struct rtc_device *rtc; >>> @@ -124,11 +126,28 @@ static int xlnx_rtc_alarm_irq_enable(struct device *dev, u32 enabled) >>> { >>> struct xlnx_rtc_dev *xrtcdev = dev_get_drvdata(dev); >>> >> >> here shouldn't be empty line. >> >>> - if (enabled) >>> + unsigned int status; >>> + ulong timeout; >>> + >>> + timeout = jiffies + msecs_to_jiffies(RTC_MSEC); >>> + >>> + if (enabled) { >>> + while (1) { >>> + status = readl(xrtcdev->reg_base + RTC_INT_STS); >>> + if (!((status & RTC_ALRM_MASK) == RTC_ALRM_MASK)) >>> + break; >>> + >>> + if (time_after_eq(jiffies, timeout)) { >>> + dev_err(dev, "Time out occur, while clearing alarm status bit\n"); >>> + return -ETIMEDOUT; >>> + } >>> + writel(RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_STS); >>> + } >>> + >>> writel(RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_EN); >>> - else >>> + } else { >>> writel(RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_DIS); >>> - >>> + } >> >> And here it was good to have empty line. >> >>> return 0; >>> } >>> >>> @@ -183,8 +202,8 @@ static irqreturn_t xlnx_rtc_interrupt(int irq, void *id) >>> if (!(status & (RTC_INT_SEC | RTC_INT_ALRM))) >>> return IRQ_NONE; >>> >>> - /* Clear RTC_INT_ALRM interrupt only */ >>> - writel(RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_STS); >>> + /* Disable RTC_INT_ALRM interrupt only */ >>> + writel(RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_DIS); >>> >>> if (status & RTC_INT_ALRM) >>> rtc_update_irq(xrtcdev->rtc, 1, RTC_IRQF | RTC_AF); >>> -- >>> 2.7.4 >> >> Other then these two above things look good. >> >> Alexandre: Any issue with this patch? >> > > No issue, I was kind of waiting for your review. I'll take the patch > once your comments are addressed. Ok. Thanks, Michal