From: Chanwoo Choi <cw00.choi@samsung.com>
To: Dmitry Osipenko <digetx@gmail.com>,
Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Georgi Djakov <georgi.djakov@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
MyungJoo Ham <myungjoo.ham@samsung.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
Mikko Perttunen <cyndis@kapsi.fi>,
Viresh Kumar <vireshk@kernel.org>,
Peter Geis <pgwipeout@gmail.com>,
Nicolas Chauvet <kwizart@gmail.com>,
Krzysztof Kozlowski <krzk@kernel.org>
Cc: linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v7 46/47] PM / devfreq: tegra30: Separate configurations per-SoC generation
Date: Thu, 5 Nov 2020 11:23:25 +0900 [thread overview]
Message-ID: <4a3682c2-d3cf-151f-4541-6b08d19f8179@samsung.com> (raw)
In-Reply-To: <20201104164923.21238-47-digetx@gmail.com>
Hi Dmitry,
On 11/5/20 1:49 AM, Dmitry Osipenko wrote:
> Previously we were using count-weight of the T124 for T30 in order to
> get EMC clock rate that was reasonable for T30. In fact the count-weight
> should be x2 times smaller on T30, but then devfreq was producing a bit
> too low EMC clock rate for ISO memory clients, like display controller
> for example.
>
> Now both Tegra ACTMON and Tegra DRM display drivers support interconnect
> framework and display driver tells to ICC what a minimum memory bandwidth
> is needed, preventing FIFO underflows. Thus, now we can use a proper
> count-weight value for Tegra30 and MC_ALL device config needs a bit more
> aggressive boosting.
>
> Add a separate ACTMON driver configuration that is specific to Tegra30.
>
> Tested-by: Peter Geis <pgwipeout@gmail.com>
> Tested-by: Nicolas Chauvet <kwizart@gmail.com>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
> drivers/devfreq/tegra30-devfreq.c | 68 ++++++++++++++++++++++++-------
> 1 file changed, 54 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/devfreq/tegra30-devfreq.c b/drivers/devfreq/tegra30-devfreq.c
> index 4db027ca17e1..aaa22077815c 100644
> --- a/drivers/devfreq/tegra30-devfreq.c
> +++ b/drivers/devfreq/tegra30-devfreq.c
> @@ -57,13 +57,6 @@
> #define ACTMON_BELOW_WMARK_WINDOW 3
> #define ACTMON_BOOST_FREQ_STEP 16000
>
> -/*
> - * Activity counter is incremented every 256 memory transactions, and each
> - * transaction takes 4 EMC clocks for Tegra124; So the COUNT_WEIGHT is
> - * 4 * 256 = 1024.
> - */
> -#define ACTMON_COUNT_WEIGHT 0x400
> -
> /*
> * ACTMON_AVERAGE_WINDOW_LOG2: default value for @DEV_CTRL_K_VAL, which
> * translates to 2 ^ (K_VAL + 1). ex: 2 ^ (6 + 1) = 128
> @@ -111,7 +104,7 @@ enum tegra_actmon_device {
> MCCPU,
> };
>
> -static const struct tegra_devfreq_device_config actmon_device_configs[] = {
> +static const struct tegra_devfreq_device_config tegra124_device_configs[] = {
> {
> /* MCALL: All memory accesses (including from the CPUs) */
> .offset = 0x1c0,
> @@ -133,6 +126,28 @@ static const struct tegra_devfreq_device_config actmon_device_configs[] = {
> },
> };
>
> +static const struct tegra_devfreq_device_config tegra30_device_configs[] = {
> + {
> + /* MCALL: All memory accesses (including from the CPUs) */
> + .offset = 0x1c0,
> + .irq_mask = 1 << 26,
> + .boost_up_coeff = 200,
> + .boost_down_coeff = 50,
> + .boost_up_threshold = 20,
> + .boost_down_threshold = 10,
> + },
> + {
> + /* MCCPU: memory accesses from the CPUs */
> + .offset = 0x200,
> + .irq_mask = 1 << 25,
> + .boost_up_coeff = 800,
> + .boost_down_coeff = 40,
> + .boost_up_threshold = 27,
> + .boost_down_threshold = 10,
> + .avg_dependency_threshold = 16000, /* 16MHz in kHz units */
> + },
> +};
> +
> /**
> * struct tegra_devfreq_device - state specific to an ACTMON device
> *
> @@ -155,6 +170,12 @@ struct tegra_devfreq_device {
> unsigned long target_freq;
> };
>
> +struct tegra_devfreq_soc_data {
> + const struct tegra_devfreq_device_config *configs;
> + /* Weight value for count measurements */
> + unsigned int count_weight;
> +};
> +
> struct tegra_devfreq {
> struct devfreq *devfreq;
> struct opp_table *opp_table;
> @@ -171,11 +192,13 @@ struct tegra_devfreq {
> struct delayed_work cpufreq_update_work;
> struct notifier_block cpu_rate_change_nb;
>
> - struct tegra_devfreq_device devices[ARRAY_SIZE(actmon_device_configs)];
> + struct tegra_devfreq_device devices[2];
>
> unsigned int irq;
>
> bool started;
> +
> + const struct tegra_devfreq_soc_data *soc;
> };
>
> struct tegra_actmon_emc_ratio {
> @@ -488,7 +511,7 @@ static void tegra_actmon_configure_device(struct tegra_devfreq *tegra,
> tegra_devfreq_update_avg_wmark(tegra, dev);
> tegra_devfreq_update_wmark(tegra, dev);
>
> - device_writel(dev, ACTMON_COUNT_WEIGHT, ACTMON_DEV_COUNT_WEIGHT);
> + device_writel(dev, tegra->soc->count_weight, ACTMON_DEV_COUNT_WEIGHT);
> device_writel(dev, ACTMON_INTR_STATUS_CLEAR, ACTMON_DEV_INTR_STATUS);
>
> val |= ACTMON_DEV_CTRL_ENB_PERIODIC;
> @@ -787,6 +810,8 @@ static int tegra_devfreq_probe(struct platform_device *pdev)
> if (!tegra)
> return -ENOMEM;
>
> + tegra->soc = of_device_get_match_data(&pdev->dev);
> +
> tegra->regs = devm_platform_ioremap_resource(pdev, 0);
> if (IS_ERR(tegra->regs))
> return PTR_ERR(tegra->regs);
> @@ -866,9 +891,9 @@ static int tegra_devfreq_probe(struct platform_device *pdev)
>
> tegra->max_freq = rate / KHZ;
>
> - for (i = 0; i < ARRAY_SIZE(actmon_device_configs); i++) {
> + for (i = 0; i < ARRAY_SIZE(tegra->devices); i++) {
> dev = tegra->devices + i;
> - dev->config = actmon_device_configs + i;
> + dev->config = tegra->soc->configs + i;
> dev->regs = tegra->regs + dev->config->offset;
> }
>
> @@ -933,9 +958,24 @@ static int tegra_devfreq_remove(struct platform_device *pdev)
> return 0;
> }
>
> +static const struct tegra_devfreq_soc_data tegra124_soc = {
> + .configs = tegra124_device_configs,
> +
> + /*
> + * Activity counter is incremented every 256 memory transactions,
> + * and each transaction takes 4 EMC clocks.
> + */
> + .count_weight = 4 * 256,
> +};
> +
> +static const struct tegra_devfreq_soc_data tegra30_soc = {
> + .configs = tegra30_device_configs,
> + .count_weight = 2 * 256,
> +};
> +
> static const struct of_device_id tegra_devfreq_of_match[] = {
> - { .compatible = "nvidia,tegra30-actmon" },
> - { .compatible = "nvidia,tegra124-actmon" },
> + { .compatible = "nvidia,tegra30-actmon", .data = &tegra30_soc, },
> + { .compatible = "nvidia,tegra124-actmon", .data = &tegra124_soc, },
> { },
> };
>
>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
--
Best Regards,
Chanwoo Choi
Samsung Electronics
next prev parent reply other threads:[~2020-11-05 2:09 UTC|newest]
Thread overview: 94+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-04 16:48 [PATCH v7 00/47] Introduce memory interconnect for NVIDIA Tegra SoCs Dmitry Osipenko
2020-11-04 16:48 ` [PATCH v7 01/47] clk: tegra: Export Tegra20 EMC kernel symbols Dmitry Osipenko
2020-11-06 18:23 ` Krzysztof Kozlowski
2020-11-04 16:48 ` [PATCH v7 02/47] soc/tegra: fuse: Export tegra_read_ram_code() Dmitry Osipenko
2020-11-06 18:24 ` Krzysztof Kozlowski
2020-11-04 16:48 ` [PATCH v7 03/47] soc/tegra: fuse: Add stub for tegra_sku_info Dmitry Osipenko
2020-11-06 18:25 ` Krzysztof Kozlowski
2020-11-04 16:48 ` [PATCH v7 04/47] dt-bindings: memory: tegra20: emc: Correct registers range in example Dmitry Osipenko
2020-11-06 18:28 ` Krzysztof Kozlowski
2020-11-04 16:48 ` [PATCH v7 05/47] dt-bindings: memory: tegra20: emc: Document nvidia,memory-controller property Dmitry Osipenko
2020-11-06 18:29 ` Krzysztof Kozlowski
2020-11-04 16:48 ` [PATCH v7 06/47] dt-bindings: memory: tegra20: mc: Document new interconnect property Dmitry Osipenko
2020-11-06 18:30 ` Krzysztof Kozlowski
2020-11-04 16:48 ` [PATCH v7 07/47] dt-bindings: memory: tegra20: emc: " Dmitry Osipenko
2020-11-06 18:30 ` Krzysztof Kozlowski
2020-11-04 16:48 ` [PATCH v7 08/47] dt-bindings: memory: tegra20: emc: Document OPP table and voltage regulator Dmitry Osipenko
2020-11-05 19:48 ` Rob Herring
2020-11-06 18:31 ` Krzysztof Kozlowski
2020-11-04 16:48 ` [PATCH v7 09/47] dt-bindings: memory: tegra30: mc: Document new interconnect property Dmitry Osipenko
2020-11-06 18:31 ` Krzysztof Kozlowski
2020-11-04 16:48 ` [PATCH v7 10/47] dt-bindings: memory: tegra30: emc: " Dmitry Osipenko
2020-11-06 18:31 ` Krzysztof Kozlowski
2020-11-04 16:48 ` [PATCH v7 11/47] dt-bindings: memory: tegra30: emc: Document OPP table and voltage regulator Dmitry Osipenko
2020-11-06 18:32 ` Krzysztof Kozlowski
2020-11-04 16:48 ` [PATCH v7 12/47] dt-bindings: memory: tegra124: mc: Document new interconnect property Dmitry Osipenko
2020-11-05 19:49 ` Rob Herring
2020-11-06 18:33 ` Krzysztof Kozlowski
2020-11-04 16:48 ` [PATCH v7 13/47] dt-bindings: memory: tegra124: emc: " Dmitry Osipenko
2020-11-06 18:34 ` Krzysztof Kozlowski
2020-11-04 16:48 ` [PATCH v7 14/47] dt-bindings: memory: tegra124: emc: Document OPP table and voltage regulator Dmitry Osipenko
2020-11-06 18:36 ` Krzysztof Kozlowski
2020-11-04 16:48 ` [PATCH v7 15/47] dt-bindings: tegra30-actmon: Document OPP and interconnect properties Dmitry Osipenko
2020-11-06 18:34 ` Krzysztof Kozlowski
2020-11-04 16:48 ` [PATCH v7 16/47] dt-bindings: host1x: Document new " Dmitry Osipenko
2020-11-06 18:36 ` Krzysztof Kozlowski
2020-11-04 16:48 ` [PATCH v7 17/47] dt-bindings: memory: tegra20: Add memory client IDs Dmitry Osipenko
2020-11-06 18:38 ` Krzysztof Kozlowski
2020-11-26 17:26 ` Thierry Reding
2020-11-26 17:39 ` Krzysztof Kozlowski
2020-11-26 17:45 ` Krzysztof Kozlowski
2020-11-26 17:55 ` Krzysztof Kozlowski
2020-11-26 17:59 ` Thierry Reding
2020-11-26 18:02 ` Thierry Reding
2020-11-26 18:06 ` Krzysztof Kozlowski
2020-11-04 16:48 ` [PATCH v7 18/47] dt-bindings: memory: tegra30: " Dmitry Osipenko
2020-11-06 18:38 ` Krzysztof Kozlowski
2020-11-26 17:55 ` Krzysztof Kozlowski
2020-11-04 16:48 ` [PATCH v7 19/47] dt-bindings: memory: tegra124: " Dmitry Osipenko
2020-11-06 18:39 ` Krzysztof Kozlowski
2020-11-26 17:55 ` Krzysztof Kozlowski
2020-11-04 16:48 ` [PATCH v7 20/47] ARM: tegra: Correct EMC registers size in Tegra20 device-tree Dmitry Osipenko
2020-11-04 16:48 ` [PATCH v7 21/47] ARM: tegra: Add interconnect properties to " Dmitry Osipenko
2020-11-04 16:48 ` [PATCH v7 22/47] ARM: tegra: Add interconnect properties to Tegra30 device-tree Dmitry Osipenko
2020-11-04 16:48 ` [PATCH v7 23/47] ARM: tegra: Add interconnect properties to Tegra124 device-tree Dmitry Osipenko
2020-11-04 16:49 ` [PATCH v7 24/47] ARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC device-tree Dmitry Osipenko
2020-11-04 16:49 ` [PATCH v7 25/47] ARM: tegra: Add DVFS properties to Tegra20 EMC device-tree node Dmitry Osipenko
2020-11-04 16:49 ` [PATCH v7 26/47] ARM: tegra: Add DVFS properties to Tegra30 EMC and ACTMON device-tree nodes Dmitry Osipenko
2020-11-04 16:49 ` [PATCH v7 27/47] ARM: tegra: Add DVFS properties to Tegra124 " Dmitry Osipenko
2020-11-04 16:49 ` [PATCH v7 28/47] memory: tegra: Add and use devm_tegra_memory_controller_get() Dmitry Osipenko
2020-11-06 19:02 ` Krzysztof Kozlowski
2020-11-04 16:49 ` [PATCH v7 29/47] memory: tegra: Use devm_platform_ioremap_resource() Dmitry Osipenko
2020-11-06 19:03 ` Krzysztof Kozlowski
2020-11-04 16:49 ` [PATCH v7 30/47] memory: tegra: Remove superfluous error messages around platform_get_irq() Dmitry Osipenko
2020-11-06 19:04 ` Krzysztof Kozlowski
2020-11-04 16:49 ` [PATCH v7 31/47] memory: tegra: Add missing latency allowness entry for Page Table Cache Dmitry Osipenko
2020-11-06 19:05 ` Krzysztof Kozlowski
2020-11-04 16:49 ` [PATCH v7 32/47] memory: tegra-mc: Add interconnect framework Dmitry Osipenko
2020-11-06 19:07 ` Krzysztof Kozlowski
2020-11-04 16:49 ` [PATCH v7 33/47] memory: tegra20-emc: Make driver modular Dmitry Osipenko
2020-11-06 19:07 ` Krzysztof Kozlowski
2020-11-04 16:49 ` [PATCH v7 34/47] memory: tegra20-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko
2020-11-06 19:08 ` Krzysztof Kozlowski
2020-11-04 16:49 ` [PATCH v7 35/47] memory: tegra20: Support interconnect framework Dmitry Osipenko
2020-11-06 19:10 ` Krzysztof Kozlowski
2020-11-04 16:49 ` [PATCH v7 36/47] memory: tegra20-emc: Add devfreq support Dmitry Osipenko
2020-11-05 2:30 ` Chanwoo Choi
2020-11-05 13:50 ` Dmitry Osipenko
2020-11-06 19:13 ` Krzysztof Kozlowski
2020-11-06 21:53 ` Dmitry Osipenko
2020-11-04 16:49 ` [PATCH v7 37/47] memory: tegra30: Add FIFO sizes to memory clients Dmitry Osipenko
2020-11-04 16:49 ` [PATCH v7 38/47] memory: tegra30-emc: Make driver modular Dmitry Osipenko
2020-11-04 16:49 ` [PATCH v7 39/47] memory: tegra30-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko
2020-11-04 16:49 ` [PATCH v7 40/47] memory: tegra30: Support interconnect framework Dmitry Osipenko
2020-11-04 16:49 ` [PATCH v7 41/47] memory: tegra124-emc: Make driver modular Dmitry Osipenko
2020-11-04 16:49 ` [PATCH v7 42/47] memory: tegra124: Support interconnect framework Dmitry Osipenko
2020-11-04 16:49 ` [PATCH v7 43/47] drm/tegra: dc: Support memory bandwidth management Dmitry Osipenko
2020-11-04 16:49 ` [PATCH v7 44/47] drm/tegra: dc: Extend debug stats with total number of events Dmitry Osipenko
2020-11-04 16:49 ` [PATCH v7 45/47] PM / devfreq: tegra30: Support interconnect and OPPs from device-tree Dmitry Osipenko
2020-11-05 2:22 ` Chanwoo Choi
2020-11-04 16:49 ` [PATCH v7 46/47] PM / devfreq: tegra30: Separate configurations per-SoC generation Dmitry Osipenko
2020-11-05 2:23 ` Chanwoo Choi [this message]
2020-11-04 16:49 ` [PATCH v7 47/47] PM / devfreq: tegra20: Deprecate in a favor of emc-stat based driver Dmitry Osipenko
2020-11-05 2:25 ` Chanwoo Choi
2020-11-05 13:50 ` Dmitry Osipenko
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4a3682c2-d3cf-151f-4541-6b08d19f8179@samsung.com \
--to=cw00.choi@samsung.com \
--cc=cyndis@kapsi.fi \
--cc=devicetree@vger.kernel.org \
--cc=digetx@gmail.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=georgi.djakov@linaro.org \
--cc=jonathanh@nvidia.com \
--cc=krzk@kernel.org \
--cc=kwizart@gmail.com \
--cc=kyungmin.park@samsung.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=myungjoo.ham@samsung.com \
--cc=pdeschrijver@nvidia.com \
--cc=pgwipeout@gmail.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=thierry.reding@gmail.com \
--cc=vireshk@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).